AT91SAM9263B-CU Atmel, AT91SAM9263B-CU Datasheet - Page 628

• Manufacturer Part Number: AT91SAM9263B-CU
• Description: IC ARM9 MCU 200 MHZ 324-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9263B-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: CAN, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: 2-Wire, EBI, I2S, MCI, SPI, USART
• Maximum Clock Frequency: 200 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9263-EK
• Minimum Operating Temperature: - 40 C
• Package: 324TFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 200 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 160
• Ram Memory Size: 96KB
• Cpu Speed: 240MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• For Use With: AT91SAM9263-EK - KIT EVAL FOR AT91SAM9263AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q3735625

36.7
Table 36-4.
628
0x100-0x124
0x18-0x1C
0x60-0xFB
0x0-0x4
Offset
0x2C
0x3C
0x4C
0x5C
0x10
0x14
0x20
0x24
0x28
0x30
0x34
0x38
0x40
0x44
0x48
0x50
0x54
0x58
0xC
0x8
AC97 Controller (AC97C) User Interface
AT91SAM9263
Register Mapping
Register
Reserved
Mode Register
Reserved
Input Channel Assignment Register
Output Channel Assignment Register
Reserved
Channel A Receive Holding Register
Channel A Transmit Holding Register
Channel A Status Register
Channel A Mode Register
Channel B Receive Holding Register
Channel B Transmit Holding Register
Channel B Status Register
Channel B Mode Register
Codec Channel Receive Holding Register
Codec Channel Transmit Holding Register
Codec Status Register
Codec Mode Register
Status Register
Interrupt Enable Register
Interrupt Disable Register
Interrupt Mask Register
Reserved
Reserved for Peripheral DMA Controller (PDC)
registers related to channel transfers
AC97C_CORHR
AC97C_CARHR
AC97C_CBRHR
AC97C_COTHR
AC97C_CBTHR
AC97C_CATHR
AC97C_CAMR
AC97C_CBMR
AC97C_COMR
AC97C_COSR
AC97C_CASR
AC97C_CBSR
AC97C_OCA
AC97C_IDR
AC97C_IMR
AC97C_ICA
AC97C_IER
AC97C_MR
AC97C_SR
Name
–
–
–
–
–
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Access
Read
Read
Read
Read
Read
Read
Read
Read
Write
Write
Write
Write
Write
–
–
–
–
–
6249H–ATARM–27-Jul-09
Reset
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
–
–
–
–
–
–
–
–
–
–