S9S12HY64J0MLH Freescale Semiconductor, S9S12HY64J0MLH Datasheet - Page 193

• Manufacturer Part Number: S9S12HY64J0MLH
• Description: MCU 64K FLASH AUTO 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12HY64J0MLH

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LQFP
• Controller Family/series: S12
• No. Of I/o's: 50
• Ram Memory Size: 4KB
• Cpu Speed: 64MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: S12HY
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12HY64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.3.2.6
Read: Anytime
Write: Never
Freescale Semiconductor
Address: 0x0026
CNT[5:0]
Reset
Field
POR
TBF
5–0
7
W
R
Trace Buffer Full — The TBF bit indicates that the trace buffer has stored 64 or more lines of data since it was
last armed. If this bit is set, then all 64 lines will be valid data, regardless of the value of DBGCNT bits. The TBF
bit is cleared when ARM in DBGC1 is written to a one. The TBF is cleared by the power on reset initialization.
Other system generated resets have no affect on this bit
This bit is also visible at DBGSR[7]
Count Value — The CNT bits indicate the number of valid data 20-bit data lines stored in the Trace Buffer.
Table 6-13
When the CNT rolls over to zero, the TBF bit in DBGSR is set and incrementing of CNT will continue in
end-trigger mode. The DBGCNT register is cleared when ARM in DBGC1 is written to a one. The DBGCNT
register is cleared by power-on-reset initialization but is not cleared by other system resets. Thus should a reset
occur during a debug session, the DBGCNT register still indicates after the reset, the number of valid trace buffer
entries stored before the reset occurred. The DBGCNT register is not decremented when reading from the trace
buffer.
TBF
Debug Count Register (DBGCNT)
—
0
7
TBF
0
0
1
1
= Unimplemented or Reserved
shows the correlation between the CNT bits and the number of valid data lines in the Trace Buffer.
—
0
0
6
CNT[5:0]
000000
000001
000010
000100
000110
111111
000000
000001
111110
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Figure 6-8. Debug Count Register (DBGCNT)
..
..
..
Table 6-12. DBGCNT Field Descriptions
Table 6-13. CNT Decoding Table
—
0
5
oldest data has been overwritten by most recent data
ARM bit will be cleared and the tracing session ends.
64 lines valid; if using Begin trigger alignment,
—
0
4
Description
—
64 lines valid,
No data valid
63 lines valid
0
3
Description
2 lines valid
4 lines valid
6 lines valid
1 line valid
CNT
..
—
0
2
S12S Debug Module (S12SDBGV2)
—
0
1
—
0
0
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