S9S12HY64J0MLH Freescale Semiconductor, S9S12HY64J0MLH Datasheet - Page 693

• Manufacturer Part Number: S9S12HY64J0MLH
• Description: MCU 64K FLASH AUTO 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12HY64J0MLH

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LQFP
• Controller Family/series: S12
• No. Of I/o's: 50
• Ram Memory Size: 4KB
• Cpu Speed: 64MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: S12HY
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12HY64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

19.3.2.3
The period register defines PER, the number of motor controller timer counter clocks a PWM period lasts.
The motor controller timer counter is clocked with the frequency f
refer to
PER = 2 * D[10:1].
For example, programming MCPER to 0x0022 (PER = 34 decimal) will result in 34 counts for each
complete PWM period. Setting MCPER to 0 will shut off all PWM channels as if MCAM[1:0] is set to 0
in all channel control registers after the next period timer counter overflow. In this case, the motor
controller releases all pins.
Freescale Semiconductor
Offset Module Base + 0x0002, 0x0003
Offset Module Base + 0x0002, 0x0003
Reset
Reset
W
W
R
R
Section 19.4.1.3.5, “Dither Bit
15
15
0
0
0
0
Motor Controller Period Register
= Unimplemented or Reserved
= Unimplemented or Reserved
Programming MCPER to 0x0001 and setting the DITH bit will be managed
as if MCPER is programmed to 0x0000. All PWM channels will be shut off
after the next period timer counter overflow.
14
14
0
0
0
0
Figure 19-5. Motor Controller Period Register (MCPER) with DITH = 0
Figure 19-6. Motor Controller Period Register (MCPER) with DITH = 1
13
13
0
0
0
0
12
12
0
0
0
0
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
11
11
0
0
0
0
(DITH)”), P0 is ignored and reads as a 0. In this case
P10
P10
10
10
0
0
P9
P9
9
0
9
0
NOTE
P8
P8
8
0
8
0
P7
P7
7
0
7
0
P6
P6
TC
6
0
6
0
. If dither mode is enabled (DITH = 1,
P5
P5
5
0
5
0
P4
P4
4
0
4
0
Motor Controller (MC10B8CV1)
P3
P3
3
0
3
0
P2
P2
2
0
2
0
P1
P1
1
0
1
0
P0
0
0
0
0
0
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