S9S12HY64J0MLH Freescale Semiconductor, S9S12HY64J0MLH Datasheet - Page 2
S9S12HY64J0MLH
Manufacturer Part Number
S9S12HY64J0MLH
Description
MCU 64K FLASH AUTO 64-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.S9S12HA32J0CLL.pdf
(792 pages)
Specifications of S9S12HY64J0MLH
Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LCD, Motor control PWM, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-LQFP
Controller Family/series
S12
No. Of I/o's
50
Ram Memory Size
4KB
Cpu Speed
64MHz
No. Of Timers
2
Rohs Compliant
Yes
Processor Series
S12HY
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
DEMO9S12HY64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S9S12HY64J0MLH
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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To provide the most up-to-date information, the revision of our documents on the World Wide Web will be
the most current. Your printed copy may be an earlier revision. To verify you have the latest information
available, refer to:
A full list of family members and options is included in the appendices.
The following revision history table summarizes changes contained in this document.
This document contains information for all constituent modules, with the exception of the CPU. For CPU
information please refer to CPU12-1 in the CPU12 & CPU12X Reference Manual.
http://freescale.com/
Revision History
May, 2010
July, 2009
Aug, 2009
Nov, 2009
Nov, 2010
Date
Revision
Level
1.00
1.01
1.02
1.03
1.04
initial v1.00 version
update SCI block guide, update motor pad input leakage in Appendix A
update FTMRC block guide, update MC10B8C block guide, minor update in
update PIM block guide, update CPMU block guide, update TIM block guide
update SCI block guide, update typo in device overview
chapter 1, minor typo correction in Appendix F
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