S9S12HY64J0MLH Freescale Semiconductor, S9S12HY64J0MLH Datasheet - Page 613

• Manufacturer Part Number: S9S12HY64J0MLH
• Description: MCU 64K FLASH AUTO 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12HY64J0MLH

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LQFP
• Controller Family/series: S12
• No. Of I/o's: 50
• Ram Memory Size: 4KB
• Cpu Speed: 64MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: S12HY
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12HY64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 17
64 KByte Flash Module (S12FTMRC64K1V1)
17.1
The FTMRC64K1 module implements the following:
The Flash memory is ideal for single-supply applications allowing for field reprogramming without
requiring external high voltage sources for program or erase operations. The Flash module includes a
memory controller that executes commands to modify Flash memory contents. The user interface to the
memory controller consists of the indexed Flash Common Command Object (FCCOB) register which is
written to with the command, global address, data, and any required command parameters. The memory
controller must complete the execution of a command before the FCCOB register can be written to with a
new command.
Freescale Semiconductor
Revision
Number
V01.11
V01.12
V01.13
•
•
64 Kbytes of P-Flash (Program Flash) memory
4 Kbytes of D-Flash (Data Flash) memory
Introduction
19 Dec 2008
25 Sep 2009
28 Jul 2008
Revision
Date
17.4.5.4/17-647
17.4.5.6/17-649
17.4.5.11/17-65
17.4.5.11/17-65
17.4.5.11/17-65
17.3.2.1/17-622
17.4.3.2/17-640
17.1.1/17-614
17.3.1/17-617
17.5.2/17-661
17.3.2/17-620
17.1/17-613
17.6/17-662
Sections
Affected
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
3
3
3
Table 17-1. Revision History
- Remove reference to IFRON in Program IFR definition
- Remove reference to IFRON in
- Clarify single bit fault correction for P-Flash phrase
- Add statement concerning code runaway when executing Read Once,
Program Once, and Verify Backdoor Access Key commands from Flash block
containing associated fields
- Relate Key 0 to associated Backdoor Comparison Key address
- Change “power down reset” to “reset”
- Reformat section on unsecuring MCU using BDM
The following changes were made to clarify module behavior related to Flash
register access during reset sequence and while Flash commands are active:
- Add caution concerning register writes while command is active
- Writes to FCLKDIV are allowed during reset sequence while CCIF is clear
- Add caution concerning register writes while command is active
- Writes to FCCOBIX, FCCOBHI, FCCOBLO registers are ignored during
reset sequence
Description of Changes
Table 17-4
and
Figure 17-3
613