HD64F36912GFH Renesas Electronics America, HD64F36912GFH Datasheet - Page 131

• Manufacturer Part Number: HD64F36912GFH
• Description: IC H8 MCU FLASH 8K 32-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F36912GFH

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 12MHz
• Connectivity: I²C, SCI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

7.2.3
EBR1 specifies the flash memory erase area block. EBR1 is initialized to H'00 when the SWE bit
in FLMCR1 is 0. Do not set more than one bit at a time, as this will cause all the bits in EBR1 to
be automatically cleared to 0.
7.2.4
Bit 7 (FLSHE) in FENR enables or disables the CPU access to the flash memory control registers,
FLMCR1, FLMCR2, and EBR1.
Bit
7, 6
5
4
3
2
1
0
Bit
7
6 to 0
Bit Name
—
EB5
EB4
EB3
EB2
EB1
EB0
Bit Name
FLSHE
—
Erase Block Register 1 (EBR1)
Flash Memory Enable Register (FENR)
Initial
Value
All 0
0
0
0
0
0
0
Initial
Value
0
All 0
R/W
—
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
Description
Reserved
These bits are always read as 0.
When this bit is set to 1, 4 kbytes of H'2000 to H'2FFF will
be erased.
When this bit is set to 1, 4 kbytes of H'1000 to H'1FFF will
be erased.
When this bit is set to 1, 1 kbyte of H'0C00 to H'0FFF will
be erased.
When this bit is set to 1, 1 kbyte of H'0800 to H'0BFF will
be erased.
When this bit is set to 1, 1 kbyte of H'0400 to H'07FF will
be erased.
When this bit is set to 1, 1 kbyte of H'0000 to H'03FF will
be erased.
Description
Flash Memory Control Register Enable
Flash memory control registers can be accessed when
this bit is set to 1. Flash memory control registers cannot
be accessed when this bit is set to 0.
Reserved
These bits are always read as 0.
Rev. 3.00 Sep. 14, 2006 Page 101 of 408
REJ09B0105-0300
Section 7 ROM