HD64F36912GFH Renesas Electronics America, HD64F36912GFH Datasheet - Page 256

IC H8 MCU FLASH 8K 32-QFP

HD64F36912GFH

Manufacturer Part Number
HD64F36912GFH
Description
IC H8 MCU FLASH 8K 32-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet

Specifications of HD64F36912GFH

Core Processor
H8/300H
Core Size
16-Bit
Speed
12MHz
Connectivity
I²C, SCI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F36912GFH
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 14 Serial Communication Interface 3 (SCI3)
Rev. 3.00 Sep. 14, 2006 Page 226 of 408
REJ09B0105-0300
Figure 14.15 Sample Flowchart of Simultaneous Serial Transmit and Receive Operations
Yes
No
No
Clear TE and RE bits in SCR to 0
Start transmission/reception
Write transmit data to TDR
Read receive data in RDR
Read RDRF flag in SSR
Read TDRE flag in SSR
Read OER flag in SSR
All data received?
TDRE = 1
RDRF = 1
OER = 1
<End>
Yes
Yes
No
No
(Clocked Synchronous Mode)
Yes
Overrun error
processing
[1]
[2]
[3]
[4]
[1]
[2]
[3]
[4]
For overrun error processing, see
Read SSR and check that the TDRE
flag is set to 1, then write transmit
data to TDR.
When data is written to TDR, the
TDRE flag is automatically cleared to
0.
Read SSR and check that the RDRF
flag is set to 1, then read the receive
data in RDR.
When data is read from RDR, the
RDRF flag is automatically cleared to
0.
To continue serial transmission/
reception, before the MSB (bit 7) of
the current frame is received, finish
reading the RDRF flag, reading RDR.
Also, before the MSB (bit 7) of the
current frame is transmitted, read 1
writing is possible. Then write data to
TDR.
When data is written to TDR, the
TDRE flag is automatically cleared to
0. When data is read from RDR, the
RDRF flag is automatically cleared to
0.
If an overrun error occurs, read the
OER flag in SSR, and after
performing the appropriate error
processing, clear the OER flag to 0.
Transmission/reception cannot be
resumed if the OER flag is set to 1.
figure 14.14.
from the TDRE flag to confirm that

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