HD64F36912GFH Renesas Electronics America, HD64F36912GFH Datasheet - Page 431

• Manufacturer Part Number: HD64F36912GFH
• Description: IC H8 MCU FLASH 8K 32-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F36912GFH

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 12MHz
• Connectivity: I²C, SCI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Item
Figure 2.1 Memory Map (2)
Table 3.1 Exception Sources
and Vector Address
Figure 5.1 Block Diagram of
Clock Pulse Generators
5.2.1 RC Control Register
(RCCR)
5.2.2 RC Trimming Data
Protect Register
(RCTRMDPR)
Page Revision (See Manual for Details)
13
48
69
71
73
Bit
1
0
Bit
4
Note: * Available for the H8/36912 Group only.
Relative Module
IIC2*
Timer B1*
Bit Name
RCPSC1
RCPSC0
Bit Name
TRMDRWE Trimming Date Register Write Enable
H'0000
H'0045
H'0046
(Masked ROM version
(under planning))
OSC
OSC
Interrupt vector
oscillator
On-chip
Description
Division Ratio Select for On-chip Oscillator
The division ratio of R
rewriting this bit.
These bits can be written to only when the CKSTA
bit in CKCSR is 0.
0X: R
10: R
11: R
Description
This register can be written to when the LOCKDW
bit is 0 and this bit is 1.
[Setting condition]
[Clearing conditions]
H8/36911
H8/36901
1
2
When writing 0 to the WRI bit while writing 1 to
the TRMDRWE bit while the PRWE bit is 1
Reset
When writing 0 to the WRI bit and writing 0 to
the TRMDRWE bit while the PRWE bit is 1
OSC
OSC
Rev. 3.00 Sep. 14, 2006 Page 401 of 408
OSC
R
/2
OSC
/4
oscillator
(not divided)
Exception Sources
IIC_2 transmit data empty
IIC_2 transmit end
IIC_2 receive error
Timer B1 overflow
System
clock
divider
Clock
H'0000
H'0045
H'0046
OSC
R
R
R
OSC
OSC
OSC
OSC
(Masked ROM version
correction
circuit
/2
/4
Duty
(under planning))
changes right after
Interrupt vector
H8/36900
REJ09B0105-0300