HD64F36912GFH Renesas Electronics America, HD64F36912GFH Datasheet - Page 232

IC H8 MCU FLASH 8K 32-QFP

HD64F36912GFH

Manufacturer Part Number
HD64F36912GFH
Description
IC H8 MCU FLASH 8K 32-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet

Specifications of HD64F36912GFH

Core Processor
H8/300H
Core Size
16-Bit
Speed
12MHz
Connectivity
I²C, SCI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F36912GFH
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 14 Serial Communication Interface 3 (SCI3)
14.3.6
SCR3 is a register that enables or disables SCI3 transfer operations and interrupt requests, and is
also used to select the transfer clock source. For details on interrupt requests, refer to section 14.7,
Interrupts.
Rev. 3.00 Sep. 14, 2006 Page 202 of 408
REJ09B0105-0300
Bit
1
0
Bit
7
6
5
4
Bit Name
CKS1
CKS0
Bit Name
TIE
RIE
TE
RE
Serial Control Register 3 (SCR3)
Initial
Value
0
0
Initial
Value
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Clock Select 0 and 1
These bits select the clock source for the baud rate
generator.
00:
01: /4 clock (n = 1)
10: /16 clock (n = 2)
11: /64 clock (n = 3)
For the relationship between the bit rate register setting
and the baud rate, see section 14.3.8, Bit Rate Register
(BRR). n is the decimal representation of the value of n in
BRR (see section 14.3.8, Bit Rate Register (BRR)).
Description
Transmit Interrupt Enable
When this bit is set to 1, the TXI interrupt request is
enabled.
Receive Interrupt Enable
When this bit is set to 1, RXI and ERI interrupt requests
are enabled.
Transmit Enable
When this bit s set to 1, transmission is enabled.
Receive Enable
When this bit is set to 1, reception is enabled.
clock (n = 0)

Related parts for HD64F36912GFH