HD64F36912GFH Renesas Electronics America, HD64F36912GFH Datasheet - Page 279

IC H8 MCU FLASH 8K 32-QFP

HD64F36912GFH

Manufacturer Part Number
HD64F36912GFH
Description
IC H8 MCU FLASH 8K 32-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet

Specifications of HD64F36912GFH

Core Processor
H8/300H
Core Size
16-Bit
Speed
12MHz
Connectivity
I²C, SCI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F36912GFH
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Bit Bit Name
4
3
2
1
0
NAKIE
STIE
ACKE
ACKBR
ACKBT
0
0
0
0
0
Initial Value R/W Description
R/W NACK Receive Interrupt Enable
R/W Stop Condition Detection Interrupt Enable
R/W Acknowledge Bit Judgement Select
R
R/W Transmit Acknowledge
This bit enables or disables the NACK receive interrupt
request (NAKI) and the overrun error (setting of the OVE bit
in ICSR) interrupt request (ERI) with the clocked
synchronous format, when the NACKF and AL bits in ICSR
are set to 1. NAKI can be canceled by clearing the NACKF,
OVE, or NAKIE bit to 0.
0: NACK receive interrupt request (NAKI) is disabled.
1: NACK receive interrupt request (NAKI) is enabled.
0: Stop condition detection interrupt request (STPI) is
1: Stop condition detection interrupt request (STPI) is
0: The value of the receive acknowledge bit is ignored, and
1: If the receive acknowledge bit is 1, continuous transfer is
Receive Acknowledge
In transmit mode, this bit stores the acknowledge data that
are returned by the receive device. This bit cannot be
modified.
0: Receive acknowledge = 0
1: Receive acknowledge = 1
In receive mode, this bit specifies the bit to be sent at the
acknowledge timing.
0: 0 is sent at the acknowledge timing.
1: 1 is sent at the acknowledge timing.
disabled.
enabled.
continuous transfer is performed.
halted.
Rev. 3.00 Sep. 14, 2006 Page 249 of 408
Section 15 I
2
C Bus Interface 2 (IIC2)
REJ09B0105-0300

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