HD64F36912GFH Renesas Electronics America, HD64F36912GFH Datasheet - Page 241
HD64F36912GFH
Manufacturer Part Number
HD64F36912GFH
Description
IC H8 MCU FLASH 8K 32-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet
1.DF36912GFHV.pdf
(442 pages)
Specifications of HD64F36912GFH
Core Processor
H8/300H
Core Size
16-Bit
Speed
12MHz
Connectivity
I²C, SCI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Manufacturer
Quantity
Price
Company:
Part Number:
HD64F36912GFH
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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14.3.9
SPMR controls the serial communication function.
Bit
7 to 3
2
1, 0
RXD input signal
Sampling clock
Noise Filter Circuit
The RXD input signal is latched through the noise filter circuit. The noise filter circuit
comprises a series of three latch circuits and a match detection circuit. The RXD input signal is
sampled by the basic clock with the 16 times the transfer clock frequency. If three latch
outputs match, its level is transferred to the next stage. If not, the circuit holds the previous
value.
That is, when the incoming signal holds the same level for three clock cycles, it is regarded as
the proper signal. If the levels of the signal is less than three clock cycles, the signal is
regarded as a noise.
Bit Name
STDSPM
Sampling Mode Register (SPMR)
Internal basic clock cycle
Sampling clock
D
Figure 14.2 Block Diagram of Noise Filter Circuit
Initial
Value
All 1
1
All 1
Latch
C
Q
R/W
R/W
D
Latch
C
Q
Description
Reserved
These bits are always read as 1.
Noise Filter Function Select
Selects the noise filter function for the RXD pin in
asynchronous mode.
0: Noise filter circuit is enabled
1: Noise filter circuit is disabled
Reserved
These bits are always read as 1.
D
Latch
C
Section 14 Serial Communication Interface 3 (SCI3)
Q
Match
detection
circuit
Rev. 3.00 Sep. 14, 2006 Page 211 of 408
(STDSPM)
SPMR
REJ09B0105-0300
Internal RXD
signal shown
in figure 14.1
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