MMC2107CFCAG33 Freescale Semiconductor, MMC2107CFCAG33 Datasheet - Page 158

IC MCU 33MHZ 128K FLASH 144-LQFP

MMC2107CFCAG33

Manufacturer Part Number
MMC2107CFCAG33
Description
IC MCU 33MHZ 128K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheet

Specifications of MMC2107CFCAG33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
72
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2107
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
72
Number Of Timers
2
Operating Supply Voltage
0 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Cpu Family
Mcore
Device Core
MCORE
Device Core Size
32b
Frequency (max)
33MHz
Total Internal Ram Size
8KB
# I/os (max)
72
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
3.6/5.5V
Operating Supply Voltage (min)
2.7/4.5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
MMC2107CFCAG33
Manufacturer:
FREESCALE
Quantity:
210
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Manufacturer:
freescaie
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Interrupt Controller Module
Technical Data
158
ME — Mask Enable Bit
MFI — Mask Fast Interrupts Bit
MASK[4:0] — Interrupt Mask Field
The read/write ME bit enables interrupt masking. Reset clears ME.
The read/write MFI bit enables masking of fast interrupt requests.
Reset clears MFI.
The read/write MASK[4:0] field determines which interrupt priority
levels are masked. When the ME bit is set, all pending interrupt
requests at priority levels at and below the current MASK value are
masked. To mask all normal interrupts without masking any fast
interrupts, set the MASK value to 31 with the MFI bit cleared. See
Table
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Interrupt masking enabled
0 = Interrupt masking disabled
1 = Fast interrupt requests masked by MASK value. All normal
0 = Fast interrupt requests are not masked regardless of the MASK
7-2. Reset clears MASK[4:0].
interrupt requests are masked.
value. The MASK only applies to normal interrupts. Reset
clears MFI.
Go to: www.freescale.com
Interrupt Controller Module
Decimal
31
0
1
2
3
Table 7-2. MASK Encoding
MASK[4:0]
Binary
00000
00001
00010
00011
11111
Masked Priority
Levels
31–0
1–0
2–0
3–0
0
MMC2107 – Rev. 2.0
MOTOROLA

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