MMC2107CFCAG33 Freescale Semiconductor, MMC2107CFCAG33 Datasheet - Page 24
![IC MCU 33MHZ 128K FLASH 144-LQFP](/photos/12/42/124277/mmc2107cfcag33_sml.jpg)
MMC2107CFCAG33
Manufacturer Part Number
MMC2107CFCAG33
Description
IC MCU 33MHZ 128K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheet
1.MMC2107CFCAF33.pdf
(618 pages)
Specifications of MMC2107CFCAG33
Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
72
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2107
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
72
Number Of Timers
2
Operating Supply Voltage
0 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Cpu Family
Mcore
Device Core
MCORE
Device Core Size
32b
Frequency (max)
33MHz
Total Internal Ram Size
8KB
# I/os (max)
72
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
3.6/5.5V
Operating Supply Voltage (min)
2.7/4.5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MMC2107CFCAG33
Manufacturer:
FREESCALE
Quantity:
210
Company:
Part Number:
MMC2107CFCAG33
Manufacturer:
freescaie
Quantity:
35
Company:
Part Number:
MMC2107CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Table of Contents
Technical Data
24
19.3.5
19.3.6
19.3.7
19.3.8
19.3.9
19.3.10 Chip Selects (CS[3:0]) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 507
19.3.11 Output Enable (OE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 507
19.3.12 Transfer Size (TSIZ[1:0]) . . . . . . . . . . . . . . . . . . . . . . . . . . 507
19.3.13 Processor Status (PSTAT[3:0]) . . . . . . . . . . . . . . . . . . . . . 507
19.4
19.5
19.6
19.7
19.7.1
19.7.1.1
19.7.1.2
19.7.1.3
19.7.2
19.7.2.1
19.7.2.2
19.7.2.3
19.8
19.8.1
19.8.2
19.9
19.9.1
19.9.2
19.9.3
19.10 Bus Monitor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 519
19.11 Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 520
20.1
20.2
20.3
Freescale Semiconductor, Inc.
For More Information On This Product,
Memory Map and Registers . . . . . . . . . . . . . . . . . . . . . . . . . . 508
Operand Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 508
Enable Byte Pins (EB[3:0]) . . . . . . . . . . . . . . . . . . . . . . . . . . . 510
Bus Master Cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 510
Bus Exception Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 516
Emulation Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 516
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 521
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 521
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 522
Emulation Mode Chip Selects (CSE[1:0]) . . . . . . . . . . . . . 506
Transfer Code (TC[2:0]) . . . . . . . . . . . . . . . . . . . . . . . . . . . 506
Read/Write (R/W) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 507
Address Bus (A[22:0]) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 507
Enable Byte (EB[3:0]). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 507
Read Cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 511
Write Cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 513
Transfer Error Termination . . . . . . . . . . . . . . . . . . . . . . . . . 516
Transfer Abort Termination . . . . . . . . . . . . . . . . . . . . . . . . 516
Emulation Chip-Selects (CSE[1:0]) . . . . . . . . . . . . . . . . . .516
Internal Data Transfer Display (Show Cycles) . . . . . . . . . . 517
Show Strobe (SHS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 518
State 1 (X1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 512
Optional Wait States (X2W) . . . . . . . . . . . . . . . . . . . . . . 512
State 2 (X2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 512
State 1 (X1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 514
Optional Wait States (X2W) . . . . . . . . . . . . . . . . . . . . . . 514
State 2 (X2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 514
Go to: www.freescale.com
Section 20. Chip Select Module
Table of Contents
MMC2107 – Rev. 2.0
MOTOROLA
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