MMC2107CFCAG33 Freescale Semiconductor, MMC2107CFCAG33 Datasheet - Page 381

• Manufacturer Part Number: MMC2107CFCAG33
• Description: IC MCU 33MHZ 128K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2107CFCAG33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MMC2107
• Core: M-CORE
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 72
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Cpu Family: Mcore
• Device Core: MCORE
• Device Core Size: 32b
• Frequency (max): 33MHz
• Total Internal Ram Size: 8KB
• # I/os (max): 72
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 3.6/5.5V
• Operating Supply Voltage (min): 2.7/4.5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

17.7.4 SPI Status Register
MMC2107 – Rev. 2.0
MOTOROLA
Address: 0x00cb_0003
Reset:
Read: Anytime
Write: Has no meaning or effect
SPIF — SPI Interrupt Flag
WCOL — Write Collision Flag
MODF — Mode Fault Flag
Read:
Write:
The SPIF flag is set after the eighth SCK cycle in a transmission when
received data transfers from the shift register to SPIDR. If the SPIE bit
is also set, SPIF generates an interrupt request. Once SPIF is set, no
new data can be transferred into SPIDR until SPIF is cleared. Clear
SPIF by reading SPISR with SPIF set and then accessing SPIDR.
Reset clears SPIF.
The WCOL flag is set when software writes to SPIDR during a
transmission. Clear WCOL by reading SPISR with WCOL set and
then accessing SPIDR. Reset clears WCOL.
The MODF flag is set when the SS pin of a master SPI is driven low
and the SS pin is configured as a mode-fault input. If the SPIE bit is
also set, MODF generates an interrupt request. A mode fault clears
the SPE, MSTR, and DDRSP[2:0] bits. Clear MODF by reading
SPISR with MODF set and then writing to SPICR1. Reset clears
MODF.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = New data available in SPIDR
0 = No new data available in SPIDR
1 = Write collision
0 = No write collision
1 = Mode fault
0 = No mode fault
Serial Peripheral Interface Module (SPI)
SPIF
Bit 7
0
Go to: www.freescale.com
Figure 17-5. SPI Status Register (SPISR)
= Writes have no effect and the access terminates without a transfer error exception.
WCOL
6
0
5
0
0
MODF
4
0
Serial Peripheral Interface Module (SPI)
3
0
0
Memory Map and Registers
2
0
0
1
0
0
Technical Data
Bit 0
0
0
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