MMC2107CFCAG33 Freescale Semiconductor, MMC2107CFCAG33 Datasheet - Page 211

• Manufacturer Part Number: MMC2107CFCAG33
• Description: IC MCU 33MHZ 128K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2107CFCAG33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MMC2107
• Core: M-CORE
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 72
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Cpu Family: Mcore
• Device Core: MCORE
• Device Core Size: 32b
• Frequency (max): 33MHz
• Total Internal Ram Size: 8KB
• # I/os (max): 72
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 3.6/5.5V
• Operating Supply Voltage (min): 2.7/4.5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

9.8.4.2 Program Margin Reads
MMC2107 – Rev. 2.0
MOTOROLA
State
S3
S4
S5
Expanded program hardware interlock
Program operation: High voltage applied to
Program margin read operation: Reads
While it is not necessary to read all words on a
operation: Program margin reads.
Programming writes accepted; all eight
program pages can be programmed. Writes
can be to any array location. Program page
buffers updated using only data, lower
address, and block address. Normal register
accesses. CMFRCTL write can change
EHV. If write is to a register, no data is
stored in program page buffer.
array or shadow information to program
CMFR bitcells. Pulse width timer active if
SCLKR[2:0]
program pulse. Programming writes not
accepted. During programming, array
cannot be accessed (bus error). Normal
register accesses. CMFRCTL write can
change only EHV.
determine if bits on selected page need
modification by program operation. Once bit
is fully programmed, data stored in program
page is updated; no further programming
occurs for that bit and value read is 0.
page to determine if another program pulse
is needed, all pages being programmed
must be read once after each program
pulse.
Table 9-7. Program Interlock State Descriptions (Continued)
0; HVS can be polled to time
Mode
The CMFR provides a program margin read with electrical margin for the
program state. Program margin reads provide sufficient margin to
assure specified data retention. The program margin read is enabled
when SE = 1 and a programming write has occurred. To increase the
access time of the program margin read the off-page access time is 17
clocks instead of the usual 2-clock off-page read access time. The
program margin read and subsequent on-page program verify reads
Freescale Semiconductor, Inc.
For More Information On This Product,
Non-Volatile Memory FLASH (CMFR)
Go to: www.freescale.com
State
Next
S1
S4
S1
S5
S4
S1
T6 Write SES = 0 or master reset
T4 Write EHV = 1
T7 Master reset
T5 EHV = 0 and HVS = 0
T8 Write EHV = 1
T9 Write SES = 0 or a master reset
Transition Requirement
Non-Volatile Memory FLASH (CMFR)
Functional Description
Technical Data
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