MMC2107CFCAG33 Freescale Semiconductor, MMC2107CFCAG33 Datasheet - Page 553

IC MCU 33MHZ 128K FLASH 144-LQFP

MMC2107CFCAG33

Manufacturer Part Number
MMC2107CFCAG33
Description
IC MCU 33MHZ 128K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheet

Specifications of MMC2107CFCAG33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
72
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2107
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
72
Number Of Timers
2
Operating Supply Voltage
0 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Cpu Family
Mcore
Device Core
MCORE
Device Core Size
32b
Frequency (max)
33MHz
Total Internal Ram Size
8KB
# I/os (max)
72
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
3.6/5.5V
Operating Supply Voltage (min)
2.7/4.5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

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Manufacturer
Quantity
Price
Part Number:
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Quantity:
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21.12 Low-Level TAP (OnCE) Module
MMC2107 – Rev. 2.0
MOTOROLA
NOTE:
The low-level TAP (OnCE, on-chip emulation) circuitry provides a
simple, inexpensive debugging interface that allows external access to
the processor’s internal registers and to memory/peripherals. OnCE
capabilities are controlled through a serial interface, mapped onto a
JTAG test access port (TAP) protocol.
Refer to
The interface to the OnCE controller and its resources is based on the
TAP defined for JTAG in the IEEE 1149.1 standard.
Figure 21-5
the MMC2107.
Freescale Semiconductor, Inc.
For More Information On This Product,
INFORMATION
PIPELINE
Figure 21-4
JTAG Test Access Port and OnCE
FIFO
PC
Go to: www.freescale.com
shows the OnCE (low-level TAP module) data registers in
Figure 21-4. OnCE Block Diagram
for a block diagram of the OnCE.
COMPARATORS
BREAKPOINT
BREAKPOINT
REGISTERS
AND TRACE
LOGIC
AND
JTAG Test Access Port and OnCE
Low-Level TAP (OnCE) Module
CONTROLLER
AND SERIAL
INTERFACE
OnCE
Technical Data
TCLK
TDI
TMS
TDO
TRST
DE
553

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