HD6417727F160CV Renesas Electronics America, HD6417727F160CV Datasheet - Page 677

IC SH MPU ROMLESS 240QFN

HD6417727F160CV

Manufacturer Part Number
HD6417727F160CV
Description
IC SH MPU ROMLESS 240QFN
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727F160CV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
160MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.7 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Bits 15 to 13—Transmit FIFO Water Mark (TFWM2 to TFWM0): The transfer request of the
transmit FIFO is controlled by TDREQ bit of SISTR register. FIFO depth is always 16 steps,
nevertheless the setting to these bits.
Bit 15:
TFWM2
0
1
Bits 7 to 5—Receive FIFO Water Mark (RFWM2 to RFWM0): The transfer request of the
receive FIFO is controlled by TDREQ bit of SISTR register. FIFO depth is always 16 steps,
nevertheless the setting to these bits.
Bit 7:
RFWM2
0
1
Bits 12 to 8—Transmit FIFO Usable Area (TFUA4 to TFUA0): TFUA shows usable number
of words for CPU or DMAC to transfer from 00000 to 10000 (initial value).
Bits 4 to 0—Receive FIFO Usable Area (RFUA4 to RFUA0): RFUA shows usable number of
words for CPU or DMAC to transfer from 00000 (initial value) to 10000.
Bit 14:
TFWM1
1
Bit 6:
RFWM1
1
0
0
Bit 13:
TFWM0
0
1
0
1
Bit 5:
RFWM0
0
1
0
1
0
0
Description
The transfer request is submitted when the size of empty
area in transmit FIFO is 16 steps
The transfer request is submitted when the size of empty
area in transmit FIFO is larger than 12 steps
The transfer request is submitted when the size of empty
area in transmit FIFO is larger than 8 steps
The transfer request is submitted when the size of empty
area in transmit FIFO is larger than 4 steps
The transfer request is submitted when the size of empty
area in transmit FIFO is larger than 1 step
Description
The transfer request is submitted when the size of empty
area of receive FIFO is larger than 1 step
The transfer request is submitted when the size of empty
area of receive FIFO is larger than 4 steps
The transfer request is submitted when the size of empty
area of receive FIFO is larger than 8 steps
The transfer request is submitted when the size of empty
area of receive FIFO is larger than 12 steps
The transfer request is submitted when the size of empty
area of receive FIFO is at 16 steps
Rev.6.00 Mar. 27, 2009 Page 619 of 1036
Section 20 Serial IO (SIOF)
REJ09B0254-0600
(Initial value)
(Initial value)

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