UPD70F3735GC-GAD-AX Renesas Electronics America, UPD70F3735GC-GAD-AX Datasheet - Page 296

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UPD70F3735GC-GAD-AX

Manufacturer Part Number
UPD70F3735GC-GAD-AX
Description
MCU 32BIT V850ES/JX3-L 80-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3735GC-GAD-AX

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
66
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 8x10b, D/A 1x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3735GC-GAD-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JF3-L
8.5.1
TQ0CTL0.TQ0CE bit is set to 1. A square wave whose half cycle is equal to the interval can be output from the TOQ00 pin.
R01UH0017EJ0400 Rev.4.00
Sep 30, 2010
In the interval timer mode, an interrupt request signal (INTTQ0CC0) is generated at the specified interval if the
Usually, the TQ0CCR1 to TQ0CCR3 registers are not used in the interval timer mode.
Interval timer mode (TQ0MD2 to TQ0MD0 bits = 000)
INTTQ0CC0 signal
TQ0CCR0 register
Count clock
selection
TOQ00 pin output
16-bit counter
TQ0CE bit
FFFFH
0000H
TQ0CE bit
Figure 8-3. Basic Timing of Operation in Interval Timer Mode
Interval (D
Figure 8-2. Configuration of Interval Timer
D
0
0
+ 1) Interval (D
CCR0 buffer register
TQ0CCR0 register
CHAPTER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
16-bit counter
Clear
D
0
Match signal
0
+ 1) Interval (D
D
0
D
0
0
+ 1) Interval (D
controller
Output
INTTQ0CC0 signal
D
0
0
+ 1)
TOQ00 pin
Page 280 of 816

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