UPD70F3735GC-GAD-AX Renesas Electronics America, UPD70F3735GC-GAD-AX Datasheet - Page 413

• Manufacturer Part Number: UPD70F3735GC-GAD-AX
• Description: MCU 32BIT V850ES/JX3-L 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3735GC-GAD-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 66
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 8x10b, D/A 1x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JF3-L
Remark
R01UH0017EJ0400 Rev.4.00
Sep 30, 2010
ADA0
FR2
0
0
0
0
1
1
1
1
Other than above
ADA0
Conversion time:
Trigger response time: If a software trigger, external trigger, or timer trigger is generated after the stabilization
Stabilization time:
In the high-speed conversion mode, the conversion is started after the stabilization time elapsed from the
ADA0M0.ADA0CE bit is set to 1, and A/D conversion is performed only during the conversion time (2.6 to 10.4
μ
ends.
In continuous conversion mode, the stabilization time is inserted only before the first conversion, and not
inserted after the second conversion (the A/D converter remains running).
Note Setting prohibited when 2.7 V ≤ AV
Cautions 1. Set as 2.6
FR1
s). The A/D conversion end interrupt request signal (INTAD) is generated immediately after the conversion
0
0
1
1
0
0
1
1
Table 13-3. Conversion Time Selection in High-Speed Conversion Mode (ADA0HS1 Bit = 1)
ADA0
FR0
0
1
0
1
0
1
0
1
2. In the high-speed conversion mode, rewriting of the ADA0M0, ADA0M2, ADA0S, ADA0PFM,
26/f
52/f
78/f
104/f
130/f
156/f
182/f
208/f
Set as 3.9
and ADA0PFT registers and trigger input are prohibited during the stabilization time.
XX
XX
XX
Conversion Time
XX
XX
XX
XX
XX
(+ Wait Time)
(+ 13/f
(+ 26/f
(+ 39/f
(+ 50/f
(+ 50/f
(+ 50/f
(+ 50/f
(+ 50/f
Actual A/D conversion time (2.6 to 10.4
A/D converter setup time (1
time, it is inserted before the conversion time.
XX
XX
XX
μ
μ
XX
XX
XX
XX
XX
s ≤ conversion time ≤ 10.4
s ≤ conversion time ≤ 10.4
)
)
)
)
)
)
)
)
Setting
prohibited
2.6
(+ 1.3
3.9
(+ 1.95
5.2
(+ 2.5
6.5
(+ 2.5
7.8
(+ 2.5
9.1
(+ 2.5
10.4
(+ 2.5
f
XX
= 20 MHz f
μ
μ
μ
μ
μ
μ
REF0
s
s
s
s
s
s
μ
Note
μ
μ
μ
μ
μ
s
μ
s)
μ
s)
s)
s)
s)
s)
s)
< 3.0 V
Setting
prohibited
3.25
(+ 1.625
4.875
(+ 2.438
6.5
(+ 3.125
8.125
(+ 3.125
9.75
(+ 3.125
Setting
prohibited
Setting
prohibited
XX
μ
A/D Conversion Time
s or longer)
= 16 MHz f
μ
Setting prohibited
μ
μ
s
μ
μ
μ
μ
s
s
s when 2.7 V ≤ AV
s when 3.0 V ≤ AV
Note
s
s
μ
μ
μ
μ
μ
s)
s)
s)
s)
s)
Setting
prohibited
4.333
(+ 2.167
6.5
(+ 3.25
8.667
(+ 4.167
Setting
prohibited
Setting
prohibited
Setting
prohibited
Setting
prohibited
μ
XX
s)
= 12 MHz f
μ
s
μ
μ
s
s
μ
μ
μ
s)
s)
s)
CHAPTER 13 A/D CONVERTER
2.6
(+ 1.3
5.2
(+ 2.6
7.8
(+ 3.9
10.4
(+ 5
Setting
prohibited
Setting
prohibited
Setting
prohibited
Setting
prohibited
XX
REF0
REF0
= 10 MHz
μ
μ
μ
μ
s
s
s
μ
s)
≤ 3.6 V.
< 3.0 V.
s
μ
μ
μ
s)
s)
s)
6.5
(+ 0
Setting
prohibited
Setting
prohibited
Setting
prohibited
Setting
prohibited
Setting
prohibited
Setting
prohibited
Setting
prohibited
f
XX
= 4 MHz
μ
μ
s
s)
Page 397 of 816
3/f
3/f
3/f
3/f
3/f
3/f
3/f
3/f
Response
Trigger
XX
XX
XX
XX
XX
XX
XX
XX
Time