UPD70F3735GC-GAD-AX Renesas Electronics America, UPD70F3735GC-GAD-AX Datasheet - Page 475

• Manufacturer Part Number: UPD70F3735GC-GAD-AX
• Description: MCU 32BIT V850ES/JX3-L 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3735GC-GAD-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 66
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 8x10b, D/A 1x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JF3-L
R01UH0017EJ0400 Rev.4.00
Sep 30, 2010
Remark
To set the baud rate, perform the following calculation for setting the UAnCTL1 and UAnCTL2 registers (when using
internal clock).
<1> Set k to fxx/(2 × target baud rate) and m to 0.
<2> If k is 256 or greater (k ≥ 256), reduce k to half (k/2) and increment m by 1 (m + 1).
<3> Repeat Step <2> until k becomes less than 256 (k < 256).
<4> Round off the first decimal point of k to the nearest whole number.
<5> Set the value of m to UAnCTL1 register and the value of k to the UAnCTL2 register.
Example: When f
The representative examples of baud rate settings are shown below.
If k becomes 256 after round-off, perform Step <2> again to set k to 128.
f
ERR: Baud rate error (%)
XX
:
Baud Rate
153,600 00H
312,500 00H
625,000 00H
19,200 02H
31,250 01H
38,400 01H
76,800 00H
(bps)
<1> k = 20,000,000/(2 × 153,600) = 65.10…, m = 0
<2>, <3> k = 65.10… < 256, m = 0
<4> Set value of UAnCTL2 register: k = 65 = 41H, set value of UAnCTL1 register: m = 0
Actual baud rate = 20,000,000/(2 × 65)
Baud rate error = {20,000,000/(2 × 65 × 153,600) − 1} × 100
1,200 06H
2,400 05H
4,800 04H
9,600 03H
Main clock frequency
300 08H
600 07H
XX
UAnCTL1 UAnCTL2
= 20 MHz and target baud rate = 153,600 bps
f
XX
82H
82H
82H
82H
82H
82H
82H
A0H
82H
82H
41H
20H
10H
= 153,846 [bps]
= 0.160 [%]
= 20 MHz
Table 15-3. Baud Rate Generator Setting Data
CHAPTER 15 ASYNCHRONOUS SERIAL INTERFACE A (UARTA)
0
0
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0
ERR (%)
UAnCTL1 UAnCTL2
07H
06H
05H
04H
03H
02H
01H
01H
00H
00H
00H
00H
00H
f
XX
D0H
D0H
D0H
D0H
D0H
D0H
D0H
80H
D0H
68H
34H
1AH
0DH
= 16 MHz
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0
0.16
0.16
0.16
−1.54
−1.54
ERR (%)
07H
06H
05H
04H
03H
02H
01H
00H
00H
00H
00H
00H
00H
UAnCTL1
f
XX
UAnCTL2
82H
82H
82H
82H
82H
82H
82H
A0H
82H
41H
21H
10H
08H
= 10 MHz
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0
0.16
0.16
−1.36
0
0
ERR (%)
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