UPD70F3735GC-GAD-AX Renesas Electronics America, UPD70F3735GC-GAD-AX Datasheet - Page 588

• Manufacturer Part Number: UPD70F3735GC-GAD-AX
• Description: MCU 32BIT V850ES/JX3-L 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3735GC-GAD-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 66
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 8x10b, D/A 1x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JF3-L
communication reservation can be made by setting the IICCn.STTn bit to 1 before a stop condition is detected (n = 0, 1).
R01UH0017EJ0400 Rev.4.00
Sep 30, 2010
SDA0n
SCL0n
Communication reservations are accepted via the following timing.
Remark
Remark
Hardware processing
1
SDA0n
Program processing
SCL0n
SPDn
STDn
n = 0, 1
2
n = 0, 1
STTn:
STDn:
SPDn:
3
Figure 17-15. Timing for Accepting Communication Reservations
Bit of IICCn register
Bit of IICSn register
Bit of IICSn register
4
Communication
reservation
STTn
=1
Figure 17-14. Communication Reservation Timing
5
6
7
Standby mode
8
Generated by master with bus access
9
Set SPDn
and INTIICn
Write to
IICn
Set
STDn
After the IICSn.STDn bit is set to 1, a
1
2
3
CAPTER 17 I
4
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5
6
2
C BUS