UPD70F3735GC-GAD-AX Renesas Electronics America, UPD70F3735GC-GAD-AX Datasheet - Page 747

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UPD70F3735GC-GAD-AX

Manufacturer Part Number
UPD70F3735GC-GAD-AX
Description
MCU 32BIT V850ES/JX3-L 80-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3735GC-GAD-AX

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
66
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 8x10b, D/A 1x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3735GC-GAD-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JF3-L
28.5.2 Features
R01UH0017EJ0400 Rev.4.00
Sep 30, 2010
(1) Secure self programming (boot swap function)
(2) Interrupt support
The V850ES/JF3-L supports a boot swap function that can exchange the physical memory of blocks 0 to 15 with
the physical memory of blocks 16 to 31. By writing the start program to be rewritten to blocks 16 to 31 in advance
and then swapping the physical memory, the entire area can be safely rewritten even if a power failure occurs
during rewriting because the correct user program always exists in blocks 0 to 15.
Instructions cannot be fetched from the flash memory during self-programming. Consequently, a user handler
written to the flash memory cannot be used even if an interrupt has occurred.
Therefore, in the V850ES/JF3-L, to use an interrupt during self-programming, processing transits to the specific
address
at the specific address
Note NMI interrupt: Start address of internal RAM
Caution To execute the INTKR interrupt servicing during self programming, set the interrupt mask flag to
Last block
Block 32
Block 31
Block 17
Block 16
Block 15
Maskable interrupt: Start address of internal RAM + 4 addresses
Block 1
Block 0
Note
:
:
:
disable interrupt (KRIC.KRMK bit = 1) and poll the interrupt request flag (KRIC.KRIF flag). Setting
the KRIC.KRMK bit to 0 (enable interrupt) during self programming is prohibited. For details of
interrupt servicing, see 19.3.4 Interrupt control register (xxICn).
in the internal RAM. Allocate the jump instruction that transits processing to the user interrupt servicing
Note
Figure 28-16. Rewriting Entire Memory Area (Boot Swap)
Rewriting blocks
in the internal RAM.
16 to 31
Last block
Block 32
Block 31
Block 17
Block 16
Block 15
Block 1
Block 0
:
:
:
Boot swap
CHAPTER 28 FLASH MEMORY
Last block
Block 32
Block 31
Block 17
Block 16
Block 15
Block 1
Block 0
:
:
:
Page 731 of 816

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