UPSD3433EB40U6 STMicroelectronics, UPSD3433EB40U6 Datasheet - Page 114

• Manufacturer Part Number: UPSD3433EB40U6
• Description: MCU 8BIT 8032 128KB FLASH 80TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3433EB40U6

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• For Use With: 497-5518 - EVAL BOARD RFID READER497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: 497-5660

IrDA interface
Note:
114/293
1
To produce this fixed data pulse width when the PULSE bit = 0, a prescaler is needed to
generate an internal reference clock, SIRClk, shown in
derived by dividing the oscillator clock frequency, f
SFR named IRDACON. A divisor must be chosen to produce a frequency for SIRClk that
lies between 1.34 MHz and 2.13 MHz, but it is best to choose a divisor value that produces
SIRClk frequency as close to 1.83MHz as possible, because SIRClk at 1.83MHz will
produce an fixed IrDA data pulse width of 1.63µs.
for CDIV[4:0] based on several different values of f
For reference, SIRClk of 2.13MHz will generate a fixed IrDA data pulse width of 1.41µs, and
SIRClk of 1.34MHz will generate a fixed data pulse width of 2.23µs.
Table 53.
When PULSE bit = 0 (fixed data pulse width), this is minimum recommended f
CDIV[4:0] must be 4 or greater.
36.864, or 36.00
11.059, or 12.00
f
OSC
7.3728
40.00
24.00
Recommended CDIV[4:0] values to generate SIRClk (default CDIV[4:0] =
0Fh, 15 decimal)
(MHz)
(1)
Value in CDIV[4:0]
0Dh, 13 decimal
16h, 22 decimal
14h, 20 decimal
06h, 6 decimal
04h, 4 decimal
OSC,
Table 53
OSC
.
using the five bits CDIV[4:0] in the
Figure 39 on page
provides recommended values
Resulting f
1.84, or 1.80
1.84, or 2.00
111. SIRClk is
1.82
1.84
1.84
SIRCLK
OSC
uPSD34xx
(MHz)
because