UPSD3433EB40U6 STMicroelectronics, UPSD3433EB40U6 Datasheet - Page 141

MCU 8BIT 8032 128KB FLASH 80TQFP

UPSD3433EB40U6

Manufacturer Part Number
UPSD3433EB40U6
Description
MCU 8BIT 8032 128KB FLASH 80TQFP
Manufacturer
STMicroelectronics
Series
µPSDr
Datasheet

Specifications of UPSD3433EB40U6

Core Processor
8032
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
For Use With
497-5518 - EVAL BOARD RFID READER497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
497-5660

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPSD3433EB40U6
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
UPSD3433EB40U6
Manufacturer:
ST
0
uPSD34xx
Table 64.
Table 65.
DIV128
Bit 7
Bit 7
7-4
1-0
Bit
Bit
3
2
1
0
7
6
5
4
3
2
SPICON1: SPI interface control register 1 (SFR D7h, reset value 00h)
SPICLKD: SPI prescaler (clock divider) register (SFR D2h, reset value
04h)
Not Used
Symbol
Symbol
DIV128
RORIE
DIV64
DIV64
DIV32
DIV16
TEIE
DIV8
DIV4
Bit 6
Bit 6
RIE
TIE
DIV32
Bit 5
Bit 5
R/W
R/W
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Reserved
Transmission End Interrupt Enable
0 = Disable Interrupt for Transmission End
1 = Enable Interrupt for Transmission End
Receive Overrun Interrupt Enable
0 = Disable Interrupt for Receive Overrun
1 = Enable Interrupt for Receive Overrun
Transmission Interrupt Enable
0 = Disable Interrupt for SPITDR empty
1 = Enable Interrupt for SPITDR empty
Reception Interrupt Enable
0 = Disable Interrupt for SPIRDR full
1 = Enable Interrupt for SPIRDR full
0 = No division
1 = Divide f
0 = No division
1 = Divide f
0 = No division
1 = Divide f
0 = No division
1 = Divide f
0 = No division
1 = Divide f
0 = No division
1 = Divide f
DIV16
Bit 4
Bit 4
OSC
OSC
OSC
OSC
OSC
OSC
Bit 3
TEIE
Bit 3
DIV8
clock by 128
clock by 64
clock by 32
clock by 16
clock by 8
clock by 4
SPI (synchronous peripheral interface)
Definition
Definition
RORIE
Bit 2
Bit 2
DIV4
Bit 1
Bit 1
TIE
Bit 0
Bit 0
RIE
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