MC68908GZ8MFAE Freescale Semiconductor, MC68908GZ8MFAE Datasheet - Page 150

• Manufacturer Part Number: MC68908GZ8MFAE
• Description: IC MCU 8BIT 8K FLASH 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68908GZ8MFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-LQFP
• Processor Series: M689xx
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Operating Supply Voltage: 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05AE, DEMO908GZ60E, M68EML08GZE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

MSCAN08 Controller (MSCAN08)
12.13.8 MSCAN08 Transmitter Control Register
ABTRQ2–ABTRQ0 — Abort Request
TXEIE2–TXEIE0 — Transmitter Empty Interrupt Enable
12.13.9 MSCAN08 Identifier Acceptance Control Register
150
The CPU sets an ABTRQx bit to request that an already scheduled message buffer (TXE = 0) be
aborted. The MSCAN08 will grant the request if the message has not already started transmission, or
if the transmission is not successful (lost arbitration or error). When a message is aborted the
associated TXE and the abort acknowledge flag (ABTAK) (see
Register) will be set and an TXE interrupt is generated if enabled. The CPU cannot reset ABTRQx.
ABTRQx is cleared implicitly whenever the associated TXE flag is set.
1 = Abort request pending
0 = No abort request
1 = A transmitter empty (transmit buffer available for transmission) event results in a transmitter
0 = No interrupt is generated from this event.
empty interrupt.
Address:
Address:
The software must not clear one or more of the TXE flags in CTFLG and
simultaneously set the respective ABTRQ bit(s).
The CTCR register is held in the reset state when the SFTRES bit in
CMCR0 is set.
Reset:
Reset:
Read:
Read:
Write:
Write:
Figure 12-24. Identifier Acceptance Control Register (CIDAC)
$0507
$0508
Bit 7
Bit 7
0
0
0
0
Figure 12-23. Transmitter Control Register (CTCR)
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 4
= Unimplemented
= Unimplemented
ABTRQ2
6
0
6
0
0
ABTRQ1
IDAM1
5
0
5
0
NOTE
NOTE
ABTRQ0
IDAM0
4
0
4
0
3
0
0
3
0
0
12.13.7 MSCAN08 Transmitter Flag
TXEIE2
2
0
2
0
0
TXEIE1
IDHIT1
1
0
1
0
Freescale Semiconductor
TXEIE0
IDHIT0
Bit 0
Bit 0
0
0