MC68908GZ8MFAE Freescale Semiconductor, MC68908GZ8MFAE Datasheet - Page 44
![IC MCU 8BIT 8K FLASH 48-LQFP](/photos/37/62/376278/tqfp-48_sml.jpg)
MC68908GZ8MFAE
Manufacturer Part Number
MC68908GZ8MFAE
Description
IC MCU 8BIT 8K FLASH 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC68908GZ8CFJER.pdf
(314 pages)
Specifications of MC68908GZ8MFAE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, LIN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
M689xx
Core
HC08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, SCI, CAN
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
37
Number Of Timers
2
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908GZ60E, M68EML08GZE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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- Download datasheet (5Mb)
Memory
2.6.6 FLASH Block Protection
Due to the ability of the on-board charge pump to erase and program the FLASH memory in the target
application, provision is made for protecting a block of memory from unintentional erase or program
operations due to system malfunction. This protection is done by using of a FLASH block protect register
(FLBPR). The FLBPR determines the range of the FLASH memory which is to be protected. The range
of the protected area starts from a location defined by FLBPR and ends at the bottom of the FLASH
memory ($FFFF). When the memory is protected, the HVEN bit cannot be set in either ERASE or
PROGRAM operations.
When the FLBPR is program with all 0’s, the entire memory is protected from being programmed and
erased. When all the bits are erased (all 1’s), the entire memory is accessible for program and erase.
When bits within the FLBPR are programmed, they lock a block of memory, address ranges as shown in
2.6.7 FLASH Block Protect
any erase or program of the FLBPR or the protected block of FLASH memory is prohibited. Mass erase
is disabled whenever any block is protected (FLBPR does not equal $FF). The presence of a V
IRQ pin will bypass the block protection so that all of the memory included in the block protect register is
open for program and erase operations.
2.6.7 FLASH Block Protect Register
The FLASH block protect register (FLBPR) is implemented as a byte within the FLASH memory, and
therefore can only be written during a programming sequence of the FLASH memory. The value in this
register determines the starting location of the protected range within the FLASH memory.
BPR[7:0] — FLASH Block Protect Bits
44
These eight bits represent bits [13:6] of a 16-bit memory address.
Bit 15 and Bit 14 are 1s and bits [5:0] are 0s.
Address:
In performing a program or erase operation, the FLASH block protect
register must be read after setting the PGM or ERASE bit and before
asserting the HVEN bit
The FLASH block protect register is not protected with special hardware or
software. Therefore, if this page is not protected by FLBPR the register is
erased by either a page or mass erase operation.
Reset:
Read:
Write:
U = Unaffected by reset. Initial value from factory is 1.
Write to this register is by a programming sequence to the FLASH memory.
$FF7E
BPR7
Bit 7
U
Figure 2-5. FLASH Block Protect Register (FLBPR)
Register. Once the FLBPR is programmed with a value other than $FF or $FE,
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 4
BPR6
U
6
BPR5
U
5
NOTE
NOTE
BPR4
U
4
BPR3
U
3
BPR2
U
2
BPR1
U
1
Freescale Semiconductor
BPR0
Bit 0
U
TST
on the
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