MCF5253CVM140 Freescale Semiconductor, MCF5253CVM140 Datasheet - Page 442

• Manufacturer Part Number: MCF5253CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire V2
• Device Core Size: 32b
• Frequency (max): 140MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2/3.3V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Supply Voltage (min): 1.08/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 225
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Address
Address
MBAR2 + 0x81C
(FIFO_DATA_16)
MBAR2 + 0x818
(FIFO_DATA_32)
Address
Address
Address
Address
Address
Address
MBAR2 + 0x8A0
(DRIVE_DATA)
MBAR2 + 0x8A4
(DRIVE_FEATURES)
MBAR2 + 0x8A8
(DRIVE_SECTOR_COUN
T)
MBAR2 + 0x8AC
(DRIVE_SECTOR_NUM)
MBAR2 + 0x8B0
(DRIVE_CYL_LOW)
MBAR2 + 0x8B4
(DRIVE_CYL_HIGH)
MBAR2 + 0x8B8
(DRIVE_DEV_HEAD)
MBAR2 + 0x8BC
(DRIVE_COMMAND)
MBAR2 + 0x8C0
(DRIVE_STATUS)
MBAR2 + 0x8C4
(DRIVE_ALT_STATUS)
MBAR2 + 0x8C8
(DRIVE_CONTROL)
Advanced Technology Attachment Controller (ATA)
Table 23-9
23-16
MBAR2 + 0x800 (TIME_OFF)
MBAR2 + 0x801 (TIME_ON)
Address
shows the ATA register summary.
Name
INTERRUPT_PENDING Interrupt pending register
DRIVE_SECTOR_NUM Drive sector number register
INTERRUPT_ENABLE Interrupt enable register
DRIVE_ALT_STATUS Drive alternate status register Read-only
INTERRUPT_CLEAR Interrupt clear register
DRIVE_DEV_HEAD
DRIVE_FEATURES
DRIVE_COMMAND
DRIVE_CYL_HIGH
DRIVE_CONTROL
DRIVE_SECTOR_
DRIVE_CYL_LOW
DRIVE_STATUS
ATA_CONTROL
FIFO_DATA_16
FIFO_DATA_32
FIFO_ALARM
DRIVE_DATA
TIME_CYC
FIFO_FILL
TIME_SS
Register
COUNT
Table 23-8. ATA Memory Map (continued)
Table 23-9. ATA Register Summary
W
W
R
R
MCF5253 Reference Manual, Rev. 1
UDMA timing parameter.
Controls tss
UDMA timing parameter.
Controls tcyc and t2cyc
16-bit wide or 32-bit wide
data port to/from FIFO
FIFO filling in halfwords
ATA interface control register
FIFO alarm threshold
Drive data register
Drive features register
Drive sector count register
Drive cylinder low register
Drive cylinder high register
Drive device head register
Drive command register
Drive status register
Drive control register
7
Description
6
5
TIME_OFF[7:0]
TIME_ON[7:0]
4
Read-only
Write-only
Write-only
Read-only
Write-only
16-bit RW
Read-only
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
3
0x— — — —
0x— — — —
Reset Value
— — — —
0x— —
0x1 —
0x0 —
0x01
0x01
0x00
0x00
0x00
Freescale Semiconductor
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–
–
–
–
–
–
–
–
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