ATMEGA128A-ANR Atmel, ATMEGA128A-ANR Datasheet - Page 177

• Manufacturer Part Number: ATMEGA128A-ANR
• Description: IC MCU AVR 128K FLASH 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128A-ANR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP
• Core: AVR8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

20.3.1
20.3.2
8151H–AVR–02/11
Internal Clock Generation – The Baud Rate Generator
Double Speed Operation (U2X)
Signal description:
txclk
rxclk
xcki
xcko
fosc
Internal clock generation is used for the asynchronous and the synchronous master modes of
operation. The description in this section refers to
The USART Baud Rate Register (UBRR) and the down-counter connected to it function as a
programmable prescaler or baud rate generator. The down-counter, running at system clock
(fosc), is loaded with the UBRR value each time the counter has counted down to zero or when
the UBRRL Register is written. A clock is generated each time the counter reaches zero. This
clock is the baud rate generator clock output (= fosc/(UBRR+1)). The transmitter divides the
baud rate generator clock output by 2, 8, or 16 depending on mode. The baud rate generator
output is used directly by the receiver’s clock and data recovery units. However, the recovery
units use a state machine that uses 2, 8, or 16 states depending on mode set by the state of the
UMSEL, U2X and DDR_XCK bits.
Table 20-1
ing the UBRR value for each mode of operation using an internally generated clock source.
Table 20-1.
Note:
BAUD
fOSC
UBRR
Some examples of UBRR values for some system clock frequencies are found in
(see
The transfer rate can be doubled by setting the U2X bit in UCSRA. Setting this bit only has effect
for the asynchronous operation. Set this bit to zero when using synchronous operation.
Operating Mode
Asynchronous Normal Mode (U2X =
0)
Asynchronous Double Speed Mode
(U2X = 1)
Synchronous Master Mode
page
1. The baud rate is defined to be the transfer rate in bit per second (bps).
198).
contains equations for calculating the baud rate (in bits per second) and for calculat-
Transmitter clock. (Internal Signal)
Receiver base clock. (Internal Signal)
Input from XCK pin (internal Signal). Used for synchronous slave operation.
Clock output to XCK pin (Internal Signal). Used for synchronous master operation.
XTAL pin frequency (System Clock).
Baud rate (in bits per second, bps)
System Oscillator clock frequency
Contents of the UBRRH and UBRRL Registers, (0 - 4095)
Equations for Calculating Baud Rate Register Setting
BAUD
BAUD
BAUD
Equation for Calculating
Baud Rate
=
=
=
-------------------------------------- -
16 UBRR
---------------------------------- -
8 UBRR
---------------------------------- -
2 UBRR
Figure
(
(
(
f
f
f
OSC
OSC
OSC
(1)
20-2.
+
+
+
1
1
1
)
)
)
Equation for Calculating
UBRR
UBRR
UBRR
ATmega128A
UBRR Value
=
=
=
----------------------- - 1
16BAUD
------------------- - 1
8BAUD
------------------- - 1
2BAUD
f
f
f
OSC
OSC
OSC
Table 20-9
–
–
–
177