ATMEGA128A-ANR Atmel, ATMEGA128A-ANR Datasheet - Page 286

• Manufacturer Part Number: ATMEGA128A-ANR
• Description: IC MCU AVR 128K FLASH 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128A-ANR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP
• Core: AVR8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

25.8.11
25.8.12
8151H–AVR–02/11
Programming Time for Flash when Using SPM
Simple Assembly Code Example for a Boot Loader
the CPU itself can execute instructions incorrectly, if the supply voltage for executing instructions
is too low.
Flash corruption can easily be avoided by following these design recommendations (one is
sufficient):
The calibrated RC Oscillator is used to time Flash accesses.
gramming time for Flash accesses from the CPU.
Table 25-5.
Flash write (page erase, page write, and
write lock bits by SPM)
1. If there is no need for a Boot Loader update in the system, program the Boot Loader
2. Keep the AVR RESET active (low) during periods of insufficient power supply voltage.
3. Keep the AVR core in Power-down Sleep mode during periods of low V
.equ PAGESIZEB = PAGESIZE*2
.org SMALLBOOTSTART
Write_page:
Wrloop:
Lock bits to prevent any Boot Loader software updates.
This can be done by enabling the internal Brown-out Detector (BOD) if the operating
voltage matches the detection level. If not, an external low V
can be used. If a Reset occurs while a write operation is in progress, the write operation
will be completed provided that the power supply voltage is sufficient.
vent the CPU from attempting to decode and execute instructions, effectively protecting
the SPMCSR Register and thus the Flash from unintentional writes.
;-the routine writes one page of data from RAM to Flash
; the first data location in RAM is pointed to by the Y pointer
; the first data location in Flash is pointed to by the Z-pointer
;-error handling is not included
;-the routine must be placed inside the boot space
; (at least the Do_spm sub routine). Only code inside NRWW section can
; be read during self-programming (page erase and page write).
;-registers used: r0, r1, temp1 (r16), temp2 (r17), looplo (r24),
; loophi (r25), spmcsrval (r20)
; storing and restoring of registers is not included in the routine
; register usage can be optimized at the expense of code size
;-It is assumed that either the interrupt table is moved to the Boot
; loader section or that the interrupts are disabled.
; page erase
ldi
call Do_spm
; re-enable the RWW section
ldi
call Do_spm
; transfer data from RAM to Flash page buffer
ldi
ldi
spmcsrval, (1<<PGERS) | (1<<SPMEN)
spmcsrval, (1<<RWWSRE) | (1<<SPMEN)
looplo, low(PAGESIZEB);init loop variable
loophi, high(PAGESIZEB);not required for PAGESIZEB<=256
SPM Programming Time.
Symbol
Min Programming Time
;PAGESIZEB is page size in BYTES, not words
3.7ms
Table 25-5
CC
Reset Protection circuit
Max Programming Time
ATmega128A
shows the typical pro-
CC
. This will pre-
4.5ms
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