ATMEGA128A-ANR Atmel, ATMEGA128A-ANR Datasheet - Page 18

IC MCU AVR 128K FLASH 64TQFP

ATMEGA128A-ANR

Manufacturer Part Number
ATMEGA128A-ANR
Description
IC MCU AVR 128K FLASH 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA128A-ANR

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP
Core
AVR8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA128A-ANR
Manufacturer:
Atmel
Quantity:
10 000
7. Memories
7.1
8151H–AVR–02/11
In-System Reprogrammable Flash Program Memory
This section describes the different memories in the Atmel
tecture has two main memory spaces, the Data Memory and the Program Memory space. In
addition, the ATmega128A features an EEPROM Memory for data storage. All three memory
spaces are linear and regular.
The ATmega128A contains 128Kbytes On-chip In-System Reprogrammable Flash memory for
program storage. Since all AVR instructions are 16 bits or 32 bits wide, the Flash is organized as
64K × 16. For software security, the Flash Program memory space is divided into two sections,
Boot Program section and Application Program section.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The ATmega128A
Program Counter (PC) is 16 bits wide, thus addressing the 64K program memory locations. The
operation of Boot Program section and associated Boot Lock bits for software protection are
described in detail in
277.
in SPI, JTAG, or Parallel Programming mode.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory and ELPM – Extended Load Program Memory instruction description).
Timing diagrams for instruction fetch and execution are presented in
ing” on page
Figure 7-1.
“Memory Programming” on page 291
14.
Program Memory Map
“Boot Loader Support – Read-While-Write Self-Programming” on page
Application Flash Section
Boot Flash Section
Program Memory
contains a detailed description on Flash programming
®
AVR
$0000
$FFFF
®
ATmega128A. The AVR archi-
“Instruction Execution Tim-
ATmega128A
18

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