ATMEGA128A-ANR Atmel, ATMEGA128A-ANR Datasheet - Page 209

• Manufacturer Part Number: ATMEGA128A-ANR
• Description: IC MCU AVR 128K FLASH 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128A-ANR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP
• Core: AVR8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

21.6
Figure 21-10. Interfacing the Application to the TWI in a Typical Transmission
8151H–AVR–02/11
Hardware
TWI bus
Action
TWI
Using the TWI
1. Application
writes to TWCR
to initiate
transmission of
START
START
2. TWINT set.
Status code indicates
START condition sent
The AVR TWI is byte-oriented and interrupt based. Interrupts are issued after all bus events, like
reception of a byte or transmission of a START condition. Because the TWI is interrupt-based,
the application software is free to carry on other operations during a TWI byte transfer. Note that
the TWI Interrupt Enable (TWIE) bit in TWCR together with the Global Interrupt Enable bit in
SREG allow the application to decide whether or not assertion of the TWINT flag should gener-
ate an interrupt request. If the TWIE bit is cleared, the application must poll the TWINT flag in
order to detect actions on the TWI bus.
When the TWINT flag is asserted, the TWI has finished an operation and awaits application
response. In this case, the TWI Status Register (TWSR) contains a value indicating the current
state of the TWI bus. The application software can then decide how the TWI should behave in
the next TWI bus cycle by manipulating the TWCR and TWDR Registers.
Figure 21-10
this example, a master wishes to transmit a single data byte to a slave. This description is quite
abstract, a more detailed explanation follows later in this section. A simple code example imple-
menting the desired behavior is also presented.
3. Check TWSR to see if START
was sent. Application loads
SLA+W into TWDR, and loads
appropriate control signals into
TWCR, making sure that TWINT
is written to one, and TWSTA is
written to zero.
1. The first step in a TWI transmission is to transmit a START condition. This is done by
2. When the START condition has been transmitted, the TWINT flag in TWCR is set, and
3. The application software should now examine the value of TWSR, to make sure that the
writing a specific value into TWCR, instructing the TWI hardware to transmit a START
condition. Which value to write is described later on. However, it is important that the
TWINT bit is set in the value written. Writing a one to TWINT clears the flag. The TWI
will not start any operation as long as the TWINT bit in TWCR is set. Immediately after
the application has cleared TWINT, the TWI will initiate transmission of the START
condition.
TWSR is updated with a status code indicating that the START condition has success-
fully been sent.
START condition was successfully transmitted. If TWSR indicates otherwise, the appli-
SLA+W
is a simple example of how the application can interface to the TWI hardware. In
4. TWINT set.
Status code indicates
SLA+W sendt, ACK
received
A
5. Check TWSR to see if SLA+W
was sent and ACK received.
Application loads data into TWDR,
and loads appropriate control signals
into TWCR, making sure that TWINT
is written to one.
Data
6. TWINT set.
Status code indicates
data sent, ACK received
A
7. Check TWSR to see if data
was sent and ACK received.
Application loads appropriate
control signals to send STOP
into TWCR, making sure that
TWINT is written to one
ATmega128A
STOP
TWINT set
Indicates
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