ATMEGA128A-ANR Atmel, ATMEGA128A-ANR Datasheet - Page 190

IC MCU AVR 128K FLASH 64TQFP

ATMEGA128A-ANR

Manufacturer Part Number
ATMEGA128A-ANR
Description
IC MCU AVR 128K FLASH 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA128A-ANR

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP
Core
AVR8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA128A-ANR
Manufacturer:
Atmel
Quantity:
10 000
20.7.10
8151H–AVR–02/11
Asynchronous Operational Range
Figure 20-7. Stop Bit Sampling and Next Start Bit Sampling
The same majority voting is done to the stop bit as done for the other bits in the frame. If the stop
bit is registered to have a logic 0 value, the Frame Error (FE) flag will be set.
A new high to low transition indicating the start bit of a new frame can come right after the last of
the bits used for majority voting. For Normal Speed mode, the first low level sample can be at
point marked (A) in
(B). (C) marks a stop bit of full length. The early start bit detection influences the operational
range of the receiver.
The operational range of the Receiver is dependent on the mismatch between the received bit
rate and the internally generated baud rate. If the Transmitter is sending frames at too fast or too
slow bit rates, or the internally generated baud rate of the receiver does not have a similar (see
Table
bit.
The following equations can be used to calculate the ratio of the incoming data rate and internal
receiver baud rate.
Table 20-2
that normal speed mode has higher toleration of baud rate variations.
D
S
S
S
R
R
F
N
slow
fast
(U2X = 0)
(U2X = 1)
Sample
Sample
RxD
20-2) base frequency, the Receiver will not be able to synchronize the frames to the start
Sum of character size and parity size (D = 5 to 10-bit).
Samples per bit. S = 16 for Normal Speed mode and S = 8 for Double Speed mode.
First sample number used for majority voting. S
for Double Speed mode.
Middle sample number used for majority voting. S
5 for Double Speed mode.
is the ratio of the slowest incoming data rate that can be accepted in relation to the
receiver baud rate
is the ratio of the fastest incoming data rate that can be accepted in relation to the
receiver baud rate.
and
R
slow
Table 20-3
=
Figure
------------------------------------------ -
S 1
1
1
2
(
D
20-7. For Double Speed mode the first low level must be delayed to
+
list the maximum receiver baud rate error that can be tolerated. Note
+
D S ⋅
3
2
1
)S
4
+
S
5
3
F
6
7
4
8
STOP 1
9
5
10
(A)
0/1
6
F
= 8 for Normal Speed and S
M
0/1
R
= 9 for Normal Speed and S
fast
(B)
0/1
0/1
=
ATmega128A
-----------------------------------
(
D
(
+
D
1
+
)S
2
)S
+
(C)
S
M
F
= 4
M
190
=

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