XC68HC12A0CPV8 Freescale Semiconductor, XC68HC12A0CPV8 Datasheet - Page 149

IC, 16BIT MCU, 68HC12, 8MHZ, TQFP-112

XC68HC12A0CPV8

Manufacturer Part Number
XC68HC12A0CPV8
Description
IC, 16BIT MCU, 68HC12, 8MHZ, TQFP-112
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of XC68HC12A0CPV8

Controller Family/series
68HC12
No. Of I/o's
68
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
8MHz
No. Of Timers
1
Core Size
16 Bit
Program Memory Size
60KB
Peripherals
ADC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
11.6.4 STOP exit without Limp Home mode, clock monitor disabled
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
EXTALi
Clock Monitor Fail
Limp-Home
13-stage counter
(Clocked by XCLK)
BCSP
STOP (DLY = 1)
STOP (DLY = 0)
SYSCLK
NOTE:
Figure 11-5. STOP Exit and Fast STOP Recovery
(NOLHM=1, CME=0, DLY=X)
If Limp home mode is disabled (V
CME (or FCME) bit is cleared, the MCU goes into STOP mode when a
STOP instruction is executed.
If EXTALi clock is present then exit from STOP will occur normally using
this clock. Under this condition, DLY should always be set to allow the
crystal to stabilise and minimise the risk of code runaway. With DLY=1
execution resumes after a delay of 4096 XCLK cycles.
The external clock signal should stabilise within the 4096 reset counter
cycles. Use of DLY=0 is not recommended due to this requirement.
0 --> 4096
PLLCLK (L.H.)
Clock Functions
Restore PLLCLK or EXTALi
Restore BCSP
DDPLL
Limp-Home and Fast STOP Recovery modes
=V
SS
or NOLHM bit set) and the
Clock Functions
Technical Data
149

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