XC68HC12A0CPV8 Freescale Semiconductor, XC68HC12A0CPV8 Datasheet - Page 455

• Manufacturer Part Number: XC68HC12A0CPV8
• Description: IC, 16BIT MCU, 68HC12, 8MHZ, TQFP-112
• Manufacturer: Freescale Semiconductor

Specifications of XC68HC12A0CPV8

• Controller Family/series: 68HC12
• No. Of I/o's: 68
• Eeprom Memory Size: 1KB
• Ram Memory Size: 2KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Core Size: 16 Bit
• Program Memory Size: 60KB
• Peripherals: ADC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

shift register — A chain of circuits that can retain the logic levels (logic 1 or logic 0) written to
signed — A binary number notation that accommodates both positive and negative numbers.
software — Instructions and data that control the operation of a microcontroller.
software interrupt (SWI) — An instruction that causes an interrupt and its associated vector
SPI — See "serial peripheral interface module (SPI)."
stack — A portion of RAM reserved for storage of CPU register contents and subroutine return
stack pointer (SP) — A 16-bit register in the CPU containing the address of the next available
start bit — A bit that signals the beginning of an asynchronous serial transmission.
status bit — A register bit that indicates the condition of a device.
stop bit — A bit that signals the end of an asynchronous serial transmission.
subroutine — A sequence of instructions to be used more than once in the course of a program.
synchronous — Refers to logic circuits and operations that are synchronized by a common
timer — A module used to relate events in a system to a point in time.
toggle — To change the state of an output from a logic 0 to a logic 1 or from a logic 1 to a logic 0.
tracking mode — A mode of PLL operation with narrow loop bandwidth. Also see ‘acquisition
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
them and that can shift the logic levels to the right or left through adjacent circuits in the
chain.
The most significant bit is used to indicate whether the number is positive or negative,
normally logic 0 for positive and logic 1 for negative. The other seven bits indicate the
magnitude of the number.
fetch.
addresses.
storage location on the stack.
The last instruction in a subroutine is a return from subroutine (RTS) instruction. At each
place in the main program where the subroutine instructions are needed, a jump or branch
to subroutine (JSR or BSR) instruction is used to call the subroutine. The CPU leaves the
flow of the main program to execute the instructions in the subroutine. When the RTS
instruction is executed, the CPU returns to the main program where it left off.
reference signal.
mode.’
Glossary
Technical Data
Glossary
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