XC68HC12A0CPV8 Freescale Semiconductor, XC68HC12A0CPV8 Datasheet - Page 272

• Manufacturer Part Number: XC68HC12A0CPV8
• Description: IC, 16BIT MCU, 68HC12, 8MHZ, TQFP-112
• Manufacturer: Freescale Semiconductor

Specifications of XC68HC12A0CPV8

• Controller Family/series: 68HC12
• No. Of I/o's: 68
• Eeprom Memory Size: 1KB
• Ram Memory Size: 2KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Core Size: 16 Bit
• Program Memory Size: 60KB
• Peripherals: ADC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Multiple Serial Interface
SC0SR1/SC1SR1 — SCI Status Register 1
Technical Data
272
RESET:
TDRE
Bit 7
1
TC
6
1
The bits in these registers are set by various conditions in the SCI
hardware and are automatically cleared by special acknowledge
sequences. The receive related flag bits in SCxSR1 (RDRF, IDLE, OR,
NF, FE, and PF) are all cleared by a read of the SCxSR1 register
followed by a read of the transmit/receive data register low byte.
However, only those bits which were set when SCxSR1 was read will be
cleared by the subsequent read of the transmit/receive data register low
byte. The transmit related bits in SCxSR1 (TDRE and TC) are cleared by
a read of the SCxSR1 register followed by a write to the transmit/receive
data registerl low byte.
Read anytime (used in auto clearing mechanism). Write has no meaning
or effect.
TDRE — Transmit Data Register Empty Flag
TC — Transmit Complete Flag
New data will not be transmitted unless SCxSR1 is read before writing
to the transmit data register. Reset sets this bit.
Flag is set when the transmitter is idle (no data, preamble, or break
transmission in progress). Clear by reading SCxSR1 with TC set and
then writing to SCxDR.
0 = SCxDR busy
1 = Any byte in the transmit data register is transferred to the serial
0 = Transmitter busy
1 = Transmitter is idle
RDRF
5
0
shift register so new data may now be written to the transmit
data register.
Multiple Serial Interface
IDLE
4
0
OR
3
0
NF
2
0
MC68HC912D60A — Rev. 3.1
FE
1
0
Freescale Semiconductor
Bit 0
PF
0
$00C4/$00CC