XC68HC12A0CPV8 Freescale Semiconductor, XC68HC12A0CPV8 Datasheet - Page 87
![IC, 16BIT MCU, 68HC12, 8MHZ, TQFP-112](/photos/19/7/190728/4243102_sml.jpg)
XC68HC12A0CPV8
Manufacturer Part Number
XC68HC12A0CPV8
Description
IC, 16BIT MCU, 68HC12, 8MHZ, TQFP-112
Manufacturer
Freescale Semiconductor
Datasheet
1.MC912D60ACFUE8.pdf
(460 pages)
Specifications of XC68HC12A0CPV8
Controller Family/series
68HC12
No. Of I/o's
68
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
8MHz
No. Of Timers
1
Core Size
16 Bit
Program Memory Size
60KB
Peripherals
ADC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PORTA — Port A Register
DDRA — Port A Data Direction Register
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
Single Chip
RESET:
Expanded
Expanded
& Periph:
RESET:
narrow
DDA7
ADDR15/
ADDR15/
DATA15/
Bit 7
DATA15
DATA7
0
Bit 7
PA7
—
DDA6
ADDR14/
ADDR14/
DATA14/
DATA14
DATA6
6
0
PA6
Bits PA[7:0] are associated respectively with addresses ADDR[15:8],
DATA[15:8] and DATA[7:0], in narrow mode. When this port is not used
for external addresses such as in single-chip mode, these pins can be
used as general-purpose I/O. DDRA determines the primary direction of
each pin. This register is not in the on-chip map in expanded and
peripheral modes. Read and write anytime.
This register determines the primary direction for each port A pin when
functioning as a general-purpose I/O port. DDRA is not in the on-chip
map in expanded and peripheral modes. Read and write anytime.
—
6
0 = Associated pin is a high-impedance input
1 = Associated pin is an output
ADDR13/
ADDR13/
DDA5
DATA13/
DATA13
DATA5
5
0
PA5
—
5
Bus Control and Input/Output
ADDR12/
ADDR12/
DATA12/
DDA4
DATA12
DATA4
PA4
4
0
—
4
ADDR11/
ADDR11/
DATA11/
DATA11
DDA3
DATA3
PA3
3
0
—
3
ADDR10/
ADDR10/
DATA10/
DATA10
DDA2
DATA2
PA2
2
0
—
2
ADDR9/
ADDR9/
DATA9/
DATA9
DATA1
DDA1
PA1
Bus Control and Input/Output
1
0
—
1
ADDR8/
ADDR8/
DATA8/
DATA8
DATA0
DDA0
Bit 0
Bit 0
PA0
—
0
Technical Data
Registers
$0000
$0002
87
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