XC68HC12A0CPV8 Freescale Semiconductor, XC68HC12A0CPV8 Datasheet - Page 82

IC, 16BIT MCU, 68HC12, 8MHZ, TQFP-112

XC68HC12A0CPV8

Manufacturer Part Number
XC68HC12A0CPV8
Description
IC, 16BIT MCU, 68HC12, 8MHZ, TQFP-112
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of XC68HC12A0CPV8

Controller Family/series
68HC12
No. Of I/o's
68
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
8MHz
No. Of Timers
1
Core Size
16 Bit
Program Memory Size
60KB
Peripherals
ADC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Modes and Resource Mapping
Technical Data
82
RFSTR1, RFSTR0 — Register Following Stretch
EXSTR1, EXSTR0 — External Access Stretch
ROMON28, ROMON32 — Enable bits for ROM
This two bit field determines the amount of clock stretch on accesses
to the 512 byte Register Following Map. It is valid regardless of the
state of the NDRF bit. In Single Chip and Peripheral Modes this bit
has no meaning or effect.
This two bit field determines the amount of clock stretch on accesses
to the External Address Space. In Single Chip and Peripheral Modes
this bit has no meaning or effect.
These bits are used to enable the Flash EEPROM arrays FEE28 and
FEE32 respectively.
0 = Corresponding Flash EEPROM array disabled from the memory
map.
1 = Corresponding Flash EEPROM array enabled in the memory
map.
Operating Modes and Resource Mapping
Table 5-3. RFSTR Stretch Bit Definition
Table 5-4. EXSTR Stretch Bit Definition
RFSTR1
EXSTR1
0
0
1
1
0
0
1
1
RFSTR0
EXSTR0
0
1
0
1
0
1
0
1
Number of E Clocks
Number of E Clocks
Stretched
Stretched
MC68HC912D60A — Rev. 3.1
0
1
2
3
0
1
2
3
Freescale Semiconductor

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