XC68HC12A0CPV8 Freescale Semiconductor, XC68HC12A0CPV8 Datasheet - Page 160

• Manufacturer Part Number: XC68HC12A0CPV8
• Description: IC, 16BIT MCU, 68HC12, 8MHZ, TQFP-112
• Manufacturer: Freescale Semiconductor

Specifications of XC68HC12A0CPV8

• Controller Family/series: 68HC12
• No. Of I/o's: 68
• Eeprom Memory Size: 1KB
• Ram Memory Size: 2KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Core Size: 16 Bit
• Program Memory Size: 60KB
• Peripherals: ADC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Clock Functions
CLKSEL — Clock Generator Clock select Register
Technical Data
160
RESET:
Bit 7
0
0
BCSP
6
0
Read and write anytime. Exceptions are listed below for each bit.
BCSP — Bus Clock Select PLL
BCSS — Bus Clock Select Slow
MCS — Module Clock Select
BCSP and BCSS bits determine the clock used by the main system
including the CPU and buses.
Cannot be set when PLLON = 0. In limp-home mode, the output of
BCSP is forced to 1, but the BCSP bit reads the latched value.
This bit has no effect when BCSP is set.
This bit determines the clock used by the ECT module and the baud
rate generators of the SCIs. In limp-home mode, the output of MCS is
forced to 0, but the MCS bit reads the latched value.
0 = SYSCLK is derived from the crystal clock or from SLWCLK.
1 = SYSCLK source is the PLL.
0 = SYSCLK is derived from the crystal clock EXTALi.
1 = SYSCLK source is the Slow clock SLWCLK.
0 = M clock is the same as PCLK.
1 = M clock is derived from Slow clock SLWCLK.
BCSS
5
0
Clock Functions
4
0
0
3
0
0
MCS
2
0
MC68HC912D60A — Rev. 3.1
1
0
0
Freescale Semiconductor
Bit 0
0
0
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