MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 259

• Manufacturer Part Number: MOD5234-100IR
• Description: MOD5234 10/100 ETHERNET MODULE
• Manufacturer: NetBurner Inc
• Type: Controllers & Processorsr

Specifications of MOD5234-100IR

• Interface: I²C, SPI, UART
• Voltage - Supply: 2.5V
• Mounting Type: Surface Mount
• Package / Case: Module
• Product: Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Format: -
• Baud Rates: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q4483564

12.3.1.8.2 ETPU Channel Drive Strength Control Register (DSCR_ETPU)
The DSCR_ETPU register controls the output drive strengths of the ETPUCH[31:0] pins.
Freescale Semiconductor
Figure 12-45. DSCR_ETPU — ETPU Channel Drive Strength Control Register
Bits
Bits
3–1
7
6
5
4
3
2
1
0
0
Address
DSCR_ETPU
DSCR_ETPU
DSCR_ETPU
DSCR_ETPU
DSCR_EIM0 EIM function drive strength 0. The DSCR_EIM0 bit sets the drive strength on the
Reset
_31_24
_23_16
_15_8
Name
Name
_7_0
W
Table 12-19. DSCR_EIM Field Descriptions (Continued)
R
—
—
—
—
—
Note: Reset state is 0 when RCON = 1 and is the value of D[21] when RCON = 0
0
0
7
Table 12-20. DSCR_ETPU Field Descriptions
Reserved, should be cleared.
following pins: TA, TEA, TIP, TS, and TSIZ[1:0].
0 Pins set at low drive
1 Pins set at high drive
Reserved, should be cleared.
ETPUCH[31:24] drive strength. This bit sets the drive strength on the ETPUCH[31:24]
pins.
0 ETPUCH[31:24] pins set at low drive
1 ETPUCH[31:24] pins set at high drive
Reserved, should be cleared.
ETPUCH[23:16] drive strength. This bit sets the drive strength on the ETPUCH[23:16]
pins.
0 ETPUCH[23:16] pins set at low drive
1 ETPUCH[23:16] pins set at high drive
Reserved, should be cleared.
ETPUCH[15:8] drive strength. This bit sets the drive strength on the ETPUCH[15:8]
pins.
0 ETPUCH[15:8] pins set at low drive
1 ETPUCH[15:8] pins set at high drive
Reserved, should be cleared.
ETPUCH[7:0] drive strength. This bit sets the drive strength on the ETPUCH[7:0] pins.
0 ETPUCH[7:0] pins set at low drive
1 ETPUCH[7:0] pins set at high drive
See Note
DSCR_
ETPU_
31_24
6
MCF5235 Reference Manual, Rev. 2
0
0
5
IPSBAR + 0x10_0051
See Note
DSCR_
ETPU_
23_16
4
Description
Description
0
0
3
See Note
DSCR_
ETPU_
15_8
2
1
0
0
Memory Map/Register Definition
See Note
DSCR_
ETPU_
7_0
0
12-31