MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 373

• Manufacturer Part Number: MOD5234-100IR
• Description: MOD5234 10/100 ETHERNET MODULE
• Manufacturer: NetBurner Inc
• Type: Controllers & Processorsr

Specifications of MOD5234-100IR

• Interface: I²C, SPI, UART
• Voltage - Supply: 2.5V
• Mounting Type: Surface Mount
• Package / Case: Module
• Product: Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Format: -
• Baud Rates: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q4483564

19.2.4.1 Ethernet Interrupt Event Register (EIR)
When an event occurs that sets a bit in the EIR, an interrupt will be generated if the corresponding
bit in the interrupt mask register (EIMR) is also set. The bit in the EIR is cleared if a one is written
to that bit position; writing zero has no effect. This register is cleared upon hardware reset.
These interrupts can be divided into operational interrupts, transceiver/network error interrupts,
and internal error interrupts. Interrupts which may occur in normal operation are GRA, TXF, TXB,
RXF, RXB, and MII. Interrupts resulting from errors/problems detected in the network or
transceiver are HBERR, BABR, BABT, LC and RL. Interrupts resulting from internal errors are
HBERR and UN.
Some of the error interrupts are independently counted in the MIB block counters. Software may
choose to mask off these interrupts since these errors will be visible to network management via
the MIB counters.
Freescale Semiconductor
• HBERR - IEEE_T_SQE
• BABR - RMON_R_OVERSIZE (good CRC), RMON_R_JAB (bad CRC)
• BABT - RMON_T_OVERSIZE (good CRC), RMON_T_JAB (bad CRC)
• LATE_COL - IEEE_T_LCOL
• COL_RETRY_LIM - IEEE_T_EXCOL
• XFIFO_UN - IEEE_T_MACERR
Address
Reset
Reset
Bits
31
30
W
W
R HB
R
ERR
31
15
0
0
0
BABR BABT GRA TXF
HBERR
Name
BABR
30
14
0
0
0
Figure 19-2. Ethernet Interrupt Event Register (EIR)
29
13
0
0
0
Heartbeat error. This interrupt indicates that HBC is set in the TCR register and that the
COL input was not asserted within the Heartbeat window following a transmission.
Babbling receive error. This bit indicates a frame was received with length in excess of
RCR[MAX_FL] bytes.
28
12
0
0
0
Table 19-4. EIR Field Descriptions
27
11
0
0
0
MCF5235 Reference Manual, Rev. 2
TXB RXF RXB
26
10
0
0
0
25
0
0
0
9
IPSBAR + 0x1004
24
0
0
0
8
MII
Description
23
0
0
7
0
ERR
EB
22
0
0
0
6
LC
21
0
0
0
5
RL
20
0
0
0
4
Memory Map/Register Definition
UN
19
0
0
0
3
18
0
0
0
0
2
17
0
0
0
0
1
16
0
0
0
0
0
19-9