LPC1857FET256,551 NXP Semiconductors, LPC1857FET256,551 Datasheet - Page 209
LPC1857FET256,551
Manufacturer Part Number
LPC1857FET256,551
Description
IC MCU 32BIT 1MB FLASH 256LBGA
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheets
1.LPC1830FET256551.pdf
(87 pages)
2.LPC1810FET100551.pdf
(2 pages)
3.LPC1810FET100551.pdf
(1164 pages)
Specifications of LPC1857FET256,551
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC1857FET256,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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User manual
13.4.5 Analog function select register
Table 116. ADC1 function select register (ENAIO1, address 0x4008 6C8C) bit description
For pins which have digital and analog functions, this register selects the analog DAC and
band gap function over any of the possible digital functions.
In addition, the DAC function is pinned out on a dedicated analog pin which is not affected
by this register.
The following pins are controlled by the ENAIO1 register:
Table 117. Pins controlled by the ENAIO2 register
By default, all pins are connected to their digital function 0 and the corresponding ENAIO2
register bit is set to one. In this case, only the digital pad is available.
Before selecting the analog pad by setting the ENAIO2 register bit to zero, the digital pad
must be set as follows using the corresponding SFSP register:
Bit
1
2
3
4
5
6
7
31:8
Pin
P4_4
PF_7
Symbol
ADC1_1
ADC1_2
ADC1_3
ADC1_4
ADC1_5
ADC1_6
ADC1_7
All information provided in this document is subject to legal disclaimers.
Value Description
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Rev. 00.13 — 20 July 2011
Select ADC1_1
Analog function ADC1_1 selected on pin PC_0.
Digital function selected on pin PC_0.
Select ADC1_2
Analog function ADC1_2 selected on pin PF_9.
Digital function selected on pin PF_9.
Select ADC1_3
Analog function ADC1_3 selected on pin PF_6.
Digital function selected on pin PF_6.
Select ADC1_4
Analog function ADC1_4 selected on pin PF_5.
Digital function selected on pin PF_5.
Select ADC1_5
Analog function ADC1_5 selected on pin PF_11.
Digital function selected on pin PF_11.
Select ADC1_6
Analog function ADC1_6 selected on pin P7_7.
Digital function selected on pin P7_7.
Select ADC1_7
Analog function ADC1_7 selected on pin PF_7.
Digital function selected on pin PF_7.
Reserved
ADC function
DAC
BG (band gap output)
Chapter 13: LPC18xx System Control Unit (SCU)
ENAIO2 register bit
0
4
UM10430
© NXP B.V. 2011. All rights reserved.
Reset
value
0
0
0
0
0
0
0
-
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