LPC1857FET256,551 NXP Semiconductors, LPC1857FET256,551 Datasheet - Page 414

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LPC1857FET256,551

Manufacturer Part Number
LPC1857FET256,551
Description
IC MCU 32BIT 1MB FLASH 256LBGA
Manufacturer
NXP Semiconductors
Series
LPC18xxr

Specifications of LPC1857FET256,551

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC1857FET256,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
<Document ID>
User manual
Fig 39. Device state diagram
resets, the device
returns to default
when the host
software only state
state
The states powered, attach, default FS/HS, suspend FS/HS are implemented in the
device controller and are communicated to the DCD using the following status bits:
interruption
power
DCSuspend - see
USB reset received - see
Port change detect - see
High-speed port - see
deconfigured
device
active state
All information provided in this document is subject to legal disclaimers.
configured
powered
address
FS/HSS
attach
default
FS/HS
FS/HS
Rev. 00.13 — 20 July 2011
Table
configured
address
asigned
device
reset
Table
Su
309.
Table
Table
Chapter 20: LPC18xx USB0 Host/Device/OTG controller
326.
set Run/Stop bit
to Run mode
309.
309.
bus inactive
bus inactive
bus inactive
bus activity
bus activity
bus activity
inactive state
suspend
suspend
spend
FS/HS
FS/HS
FS/HS
UM10430
© NXP B.V. 2011. All rights reserved.
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