LPC1857FET256,551 NXP Semiconductors, LPC1857FET256,551 Datasheet - Page 459
LPC1857FET256,551
Manufacturer Part Number
LPC1857FET256,551
Description
IC MCU 32BIT 1MB FLASH 256LBGA
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheets
1.LPC1830FET256551.pdf
(87 pages)
2.LPC1810FET100551.pdf
(2 pages)
3.LPC1810FET100551.pdf
(1164 pages)
Specifications of LPC1857FET256,551
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC1857FET256,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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Table 384. USB ULPI viewport register (ULPIVIEWPORT - address 0x4000 7170) bit description
Table 385. USB BINTERVAL register (BINTERVAL - address 0x4000 7174) bit description in device/host mode
<Document ID>
User manual
Bit
29
30
31
Bit
3:0
31:4
Symbol
BINT
-
Symbol
ULPIRW
ULPIRUN
ULPIWU
21.6.13.1 Device mode
21.6.12 BINTERVAL register
21.6.13 USB Endpoint NAK register (ENDPTNAK)
Value
0
1
This register defines the bInterval value which determines the length of the virtual frame
(see
This register indicates when the device sends a NAK handshake on an endpoint. Each Tx
and Rx endpoint has a bit in the EPTN and EPRN field respectively.
A bit in this register is cleared by writing a 1 to it.
Description
bInterval value
Reserved
Section
Description
ULPI Read/Write control. This bit selects between running a read or
write operation.
Read
Write
ULPI Read/Write Run.
Writing the 1 to this bit will begin the read/write operation. The bit will
automatically transition to 0 after the read/write is complete. Once
this bit is set, the driver can not set it back to 0.
Remark: The driver must never executue a wakeup and a read/write
operation at the same time.
ULPI Wake-up.
Writing the 1 to this bit will begin the wakeup operation. The bit will
automatically transition to 0 after the wakeup is complete. Once this
bit is set, the driver can not set it back to 0.
Remark: The driver must never executue a wakeup and a read/write
operation at the same time.
20.7.7).
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Chapter 21: LPC18xx USB1 Host/Device controller
UM10430
…continued
© NXP B.V. 2011. All rights reserved.
Access
R/W
R/W
R/W
Reset
value
0x00
-
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R/W
-
Reset
value
0
-
0
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