LPC1857FET256,551 NXP Semiconductors, LPC1857FET256,551 Datasheet - Page 25
LPC1857FET256,551
Manufacturer Part Number
LPC1857FET256,551
Description
IC MCU 32BIT 1MB FLASH 256LBGA
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheets
1.LPC1830FET256551.pdf
(87 pages)
2.LPC1810FET100551.pdf
(2 pages)
3.LPC1810FET100551.pdf
(1164 pages)
Specifications of LPC1857FET256,551
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC1857FET256,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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<Document ID>
User manual
Fig 9.
UART 0
LPC 18 xx RESET
boot
BOOT _ SRC = 1
or pins = 0
Boot process
set Shadow Pointer
BOOT _ SRC = 9
= 0 x 1000 0000
copy image to
decrypt image
AES capable
read Header
= 0
and CMAC
SRAM and
CMAC tag
valid tag ?
calculate
in SRAM
or pins = 8
active ?
UART 3
yes
yes
boot
P 2 _ 9 , P 2 _ 8 , P 1 _ 2 ,
check pins
no
P 1 _ 1
BOOT _ SRC = 6
no
or pins = 5
CPU clock
12 MHz
= IRC
set Shadow Pointer
USB 1
boot
= 0 x 1000 0000
copy image to
development
Header ?
valid
mode ?
SRAM
> 9
= 1
= 1 .. 4 , 7
yes
= 0
BOOT _ SRC = 7
yes
or pins = 6
All information provided in this document is subject to legal disclaimers.
check BOOT _ SRC
no
USB 2
no
boot
CPU clock
= 6 .. 7 , 9
= PLL 1
disable
96 MHz
IRQ &
MPU
Rev. 00.13 — 20 July 2011
60 s timeout
toggle pin
Reset
P 1 _ 1
> 10
boot
SPI
= 2 .. 5 , 8
BOOT _ SRC = 8
or pins = 7
capable and
yes
load AES
key > 0 ?
AES
key
yes
Header ?
Header
SPIFI
read
valid
boot
BOOT _SRC = 2
or pins = 1
no
set Shadow Pointer
= boot address
no
EMC 8 b
enable
JTAG
boot
Chapter 3: LPC18xx Boot ROM
4 of
BOOT _ SRC = 3
or pins = 2
EMC 16 b
boot
BOOT _ SRC = 4
or pins = 3
UM10430
© NXP B.V. 2011. All rights reserved.
EMC 32 b
boot
BOOT _ SRC = 5
or pins = 4
25 of 1164
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