DS21Q55 Maxim Integrated Products, DS21Q55 Datasheet - Page 109

• Manufacturer Part Number: DS21Q55
• Description: IC TXRX QUAD T1/E1/J1 SCT 256BGA
• Manufacturer: Maxim Integrated Products

Specifications of DS21Q55

• Function: Transceiver
• Interface: E1, J1, T1
• Number Of Circuits: 4
• Voltage - Supply: 3.14 V ~ 3.47 V
• Current - Supply: 75mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 256-BGA
• Includes: BERT Generator and Detector, Dual HDLC Controllers
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power (watts): -

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Receive Elastic Store Enable (RESE)
Bit 1/Receive Elastic Store Minimum-Delay Mode (RESMDM). See Section
Bit 2/Receive Elastic Store Reset (RESR). Setting this bit from a 0 to a 1 forces the read and write pointers into
opposite frames, maximizing the delay through the receive elastic store. It should be toggled after RSYSCLK has
been applied and is stable. See Section
Bit 3/Receive Elastic Store Align (RESALGN). Setting this bit from a 0 to a 1 forces the receive elastic store’s
write/read pointers to a minimum separation of half a frame. No action is taken if the pointer separation is already
greater or equal to half a frame. If pointer separation is less than half a frame, the command is executed and the
data is disrupted. It should be toggled after RSYSCLK has been applied and is stable. Must be cleared and set again
for a subsequent align. See Section
Bit 4/Transmit Elastic Store Enable (TESE)
Bit 5/Transmit Elastic Store Minimum-Delay Mode (TESMDM). See Section
Bit 6/Transmit Elastic Store Reset (TESR). Setting this bit from a 0 to a 1 forces the read and write pointers into
opposite frames, maximizing the delay through the transmit elastic store. Transmit data is lost during the reset. It
should be toggled after TSYSCLK has been applied and is stable. See Section
set HIGH.
Bit 7/Transmit Elastic Store Align (TESALGN). Setting this bit from a 0 to a 1 forces the transmit elastic store’s
write/read pointers to a minimum separation of half a frame. No action is taken if the pointer separation is already
greater or equal to half a frame. If pointer separation is less than half a frame, the command is executed and the
data is disrupted. It should be toggled after TSYSCLK has been applied and is stable. It must be cleared and set
again for a subsequent align. See Section
0 = elastic store is bypassed
1 = elastic store is enabled
0 = elastic stores operate at full two-frame depth
1 = elastic stores operate at 32-bit depth
0 = elastic store is bypassed
1 = elastic store is enabled
0 = elastic stores operate at full two-frame depth
1 = elastic stores operate at 32-bit depth
TESALGN
7
0
ESCR
Elastic Store Control Register
4Fh
TESR
6
0
TESMDM
17.3
17.3
5
0
for details.
17.3
for details. Do not leave this bit set HIGH.
for details.
TESE
4
0
109 of 237
RESALGN
3
0
RESR
2
0
17.3
17.4
17.4
RESMDM
for details. Do not leave this bit
for details.
for details.
1
0
RESE
0
0