DS21Q55 Maxim Integrated Products, DS21Q55 Datasheet - Page 40

• Manufacturer Part Number: DS21Q55
• Description: IC TXRX QUAD T1/E1/J1 SCT 256BGA
• Manufacturer: Maxim Integrated Products

Specifications of DS21Q55

• Function: Transceiver
• Interface: E1, J1, T1
• Number Of Circuits: 4
• Voltage - Supply: 3.14 V ~ 3.47 V
• Current - Supply: 75mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 256-BGA
• Includes: BERT Generator and Detector, Dual HDLC Controllers
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power (watts): -

ADDRESS
AA
AD
AB
AC
AE
BA
BB
BC
BD
CA
CB
CC
CD
AF
BE
CE
A4
A5
A6
A7
A8
A9
B0
B1
B2
B3
B4
B5
B6
B7
B8
B9
BF
C0
C1
C2
C3
C4
C5
C6
C7
C8
C9
CF
HDLC #2 Receive Channel Select 3
HDLC #2 Receive Channel Select 4
HDLC #2 Receive Time Slot Bits/Sa Bits Select
HDLC #2 Transmit Channel Select 1
HDLC #2 Transmit Channel Select 2
HDLC #2 Transmit Channel Select 3
HDLC #2 Transmit Channel Select 4
HDLC #2 Transmit Time Slot Bits/Sa Bits Select
HDLC #2 Receive Packet Bytes Available
HDLC #2 Transmit FIFO
HDLC #2 Receive FIFO
HDLC #2 Transmit FIFO Buffer Available
Extend System Information Bus Control Register 1
Extend System Information Bus Control Register 2
Extend System Information Bus Register 1
Extend System Information Bus Register 2
Extend System Information Bus Register 3
Extend System Information Bus Register 4
In-Band Code Control Register
Transmit Code Definition Register 1
Transmit Code Definition Register 2
Receive Up Code Definition Register 1
Receive Up Code Definition Register 2
Receive Down Code Definition Register 1
Receive Down Code Definition Register 2
In-Band Receive Spare Control Register
Receive Spare Code Definition Register 1
Receive Spare Code Definition Register 2
Receive FDL Register
Transmit FDL Register
Receive FDL Match Register 1
Receive FDL Match Register 2
Test Register
Interleave Bus Operation Control Register
Receive Align Frame Register
Receive Nonalign Frame Register
Receive Si Align Frame
Receive Si Nonalign Frame
Receive Remote Alarm Bits
Receive Sa4 Bits
Receive Sa5 Bits
Receive Sa6 Bits
Receive Sa7 Bits
Receive Sa8 Bits
REGISTER NAME
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ABBREVIATION
REGISTER
H2RTSBS
H2TTSBS
ESIBCR1
ESIBCR2
RDNCD1
RDNCD2
RFDLM1
RFDLM2
H2RPBA
H2TFBA
RUPCD1
RUPCD2
H2RCS3
H2RCS4
H2TCS1
H2TCS2
H2TCS3
H2TCS4
RSiNAF
RSCD1
RSCD2
RSiAF
ESIB1
ESIB2
ESIB3
ESIB4
RNAF
RSCC
RFDL
TCD1
TCD2
TFDL
H2TF
H2RF
TEST
IBOC
IBCC
RSa4
RSa5
RSa6
RSa7
RSa8
RRA
RAF
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