DS21Q55 Maxim Integrated Products, DS21Q55 Datasheet - Page 39
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DS21Q55
Manufacturer Part Number
DS21Q55
Description
IC TXRX QUAD T1/E1/J1 SCT 256BGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS21Q55.pdf
(237 pages)
Specifications of DS21Q55
Function
Transceiver
Interface
E1, J1, T1
Number Of Circuits
4
Voltage - Supply
3.14 V ~ 3.47 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
256-BGA
Includes
BERT Generator and Detector, Dual HDLC Controllers
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power (watts)
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DS21Q552
Manufacturer:
DALLAS
Quantity:
319
Company:
Part Number:
DS21Q552BN+
Manufacturer:
Maxim Integrated
Quantity:
10 000
Part Number:
DS21Q554
Manufacturer:
DALLAS
Quantity:
20 000
Part Number:
DS21Q554B+
Manufacturer:
MAXIM/美信
Quantity:
20 000
ADDRESS
7A
7B
7C
7D
8A
8B
8C
8D
9A
9B
9C
9D
A0
A1
A2
A3
7E
7F
8E
8F
9E
9F
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
Line Interface Control 1
Line Interface Control 2
Line Interface Control 3
Line Interface Control 4
Test Register
Transmit Line Build-Out Control
Idle Array Address Register
Per-Channel Idle Code Value Register
Transmit Idle Code Enable Register 1
Transmit Idle Code Enable Register 2
Transmit Idle Code Enable Register 3
Transmit Idle Code Enable Register 4
Receive Idle Code Enable Register 1
Receive Idle Code Enable Register 2
Receive Idle Code Enable Register 3
Receive Idle Code Enable Register 4
Receive Channel Blocking Register 1
Receive Channel Blocking Register 2
Receive Channel Blocking Register 3
Receive Channel Blocking Register 4
Transmit Channel Blocking Register 1
Transmit Channel Blocking Register 2
Transmit Channel Blocking Register 3
Transmit Channel Blocking Register 4
HDLC #1 Transmit Control
HDLC #1 FIFO Control
HDLC #1 Receive Channel Select 1
HDLC #1 Receive Channel Select 2
HDLC #1 Receive Channel Select 3
HDLC #1 Receive Channel Select 4
HDLC #1 Receive Time Slot Bits/Sa Bits Select
HDLC #1 Transmit Channel Select1
HDLC #1 Transmit Channel Select 2
HDLC #1 Transmit Channel Select 3
HDLC #1 Transmit Channel Select 4
HDLC #1 Transmit Time Slot Bits/Sa Bits Select
HDLC #1 Receive Packet Bytes Available
HDLC #1 Transmit FIFO
HDLC #1 Receive FIFO
HDLC #1 Transmit FIFO Buffer Available
HDLC #2 Transmit Control
HDLC #2 FIFO Control
HDLC #2 Receive Channel Select 1
HDLC #2 Receive Channel Select 2
REGISTER NAME
39 of 237
ABBREVIATION
REGISTER
H1RTSBS
H1TTSBS
H1RPBA
H1TFBA
H1RCS1
H1RCS2
H1RCS3
H1RCS4
H2RCS1
H2RCS2
H1TCS1
H1TCS2
H1TCS3
H1TCS4
TCICE1
TCICE2
TCICE3
TCICE4
RCICE1
RCICE2
RCICE3
RCICE4
RCBR1
RCBR2
RCBR3
RCBR4
TCBR1
TCBR2
TCBR3
TCBR4
PCICR
TLBC
H1TC
H1FC
H1RF
H2TC
H2FC
TEST
IAAR
H1TF
LIC1
LIC2
LIC3
LIC4
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