TMP86xy92DMG Toshiba, TMP86xy92DMG Datasheet - Page 148

• Manufacturer Part Number: TMP86xy92DMG
• Manufacturer: Toshiba

Specifications of TMP86xy92DMG

• Package: SSOP30
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 16
• Ram Size: 512
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 6
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 1
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 24
• Power Supply (v): 4 to 5.5

13.4
Transfer Rate
13.4
13.5
rate are determined as follows:
detected in RXD2 pin input. RT clock starts detecting “L” level of the RXD2 pin. Once a start bit is detected, the start
bit, data bits, stop bit(s), and parity bit are sampled at three times of RT7, RT8, and RT9 during one receiver clock
interval (RT clock). (RT0 is the position where the bit supposedly starts.) Bit is determined according to majority rule
(The data are the same twice or more out of three samplings).
RXD2 pin
RXD2 pin
RT clock
Internal receive data
RT clock
Internal receive data
The baud rate of UART2 is set of UART2CR1<BRG>. The example of the baud rate are shown as follows.
When TC3 is used as the UART2 transfer rate (when UART2CR1<BRG> = “110”), the transfer clock and transfer
Transfer clock [Hz] = TC3 source clock [Hz] / TTREG3 setting value
Transfer Rate [baud] = Transfer clock [Hz] / 16
The UART2 receiver keeps sampling input using the clock selected by UART2CR1<BRG> until a start bit is
Transfer Rate
Data Sampling Method
Table 13-1 Transfer Rate (Example)
BRG
000
001
010
011
100
101
RT0
RT0
Figure 13-4 Data Sampling Method
76800 [baud]
16 MHz
Start bit
1
Start bit
Start bit
1
Start bit
38400
19200
9600
4800
2400
2
2
3 4
3 4
5
5
(a) Without noise rejection circuit
(b) With noise rejection circuit
6
6
Page 134
7
7
8
8 9 10 11 12 13 14 15 0 1
9 10 11 12 13 14 15 0
38400 [baud]
Source Clock
8 MHz
19200
9600
4800
2400
1200
Bit 0
Bit 0
Bit 0
Bit 0
1
2 3
2
19200 [baud]
3
4 MHz
4
4
9600
4800
2400
1200
600
5
5 6
6
TMP86FH92DMG
7
7 8
8
9 10 11
9 10 11