TMP86xy92DMG Toshiba, TMP86xy92DMG Datasheet - Page 83

• Manufacturer Part Number: TMP86xy92DMG
• Manufacturer: Toshiba

Specifications of TMP86xy92DMG

• Package: SSOP30
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 16
• Ram Size: 512
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 6
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 1
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 24
• Power Supply (v): 4 to 5.5

7.4.2
low-voltage condition.
setting:
Setting procedure to generate a reset
Note 1: The VDCR1 and VDCR2 are only initialized by a power-on reset or an external reset input. Therefore, at the
Note 2: The voltage detect reset signal remains asserted while the supply voltage (VDD) is below the detection
The following shows the setting procedure for generating a voltage detect x reset signal upon detection of a
To disable the voltage detection circuit while it is enabled with the voltage detection reset, make the following
Note:If the voltage detection circuit is disabled without clearing interrupt enable flag, unexpected interrupt
1. Clear the INTVLTD interrupt enable flag <EF4> to 0.
2. Select the detection voltage by programming the VDCR1<VDxLVL> (x=1, 2) bits.
3. Clear the VDCR2<VDxMOD> bit to 0 to generate an INTVLTD interrupt upon detection of a low-
4. Set the VDCR2<VDxEN> bit to 1 to enable voltage detect operation.
5. Wait for 5 μs until the voltage detecting circuit stabilizes.
6. Ensure that the VDCR1<VDxSF> bit is 0.
7. Clear VDCR1<VDxF> to 0.
8. Set the VDCR2<VDxMOD> bit to 1 to generate a voltage detect x reset signal upon detection of a low-
1. Clear the INTVLTD interrupt enable flag <EF4> to 0.
2. Clear VDCR2<VDxMOD> to 0 to set the operation mode to generate voltage detection interrupt request
3. Clear VDCR2<VDxEN> to 0 to disable the voltage detection operation.
voltage condition.
voltage condition.
time when a low-voltage detect reset is released, if the supply voltage (VDD) is found to be below the detection
voltage (VDxLVL) before VDCR2<VDxEN> is cleared to 0, a voltage detect reset will immediately be gen-
erated.
voltage (LDxLVL).
signals.
request may occur.
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TMP86FH92DMG