TMP86xy92DMG Toshiba, TMP86xy92DMG Datasheet - Page 81

• Manufacturer Part Number: TMP86xy92DMG
• Manufacturer: Toshiba

Specifications of TMP86xy92DMG

• Package: SSOP30
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 16
• Ram Size: 512
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 6
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 1
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 24
• Power Supply (v): 4 to 5.5

7.3.3
7.3.4
Detection voltage level
VDCR2<VDxEN>
VDCR1<VDxSF>
VDCR1<VDxF>
Figure 7-4 Change of voltage detection flag and voltage detection status flag
relation between the supply voltage (VDD) and the detection voltage (VDxLVL), i.e, whether VDD is above or
equal to VDxLVL or VDD is below VDxLVL.
causes the VDCR1<VDxF> flag to be set. This flag remains set until it is cleared by software. VDCR1<VDxF>
is not cleared to 0 when the supply voltage (VDD) becomes equal to or higher than the detection voltage
(VDxLVL).
VDCR1<VDxF> can only be cleared by writing a 0.
causes the VDCR1<VDxSF> flag to be set to 1. When VDD rises above VDxLVL, the VDCR1<VDxSF> flag
is cleared to 0.
cording to the relation between VDD and VDxLVL.
Detection voltage level section
Voltage detection flag and voltage detection status flag
VDD level
The detection voltage level is selected by programming the VDCR1<VDxLVL> bits.
The voltage detect flag (VDCR1<VDxF>) and voltage detect status flag (VDCR1<VDxSF>) indicate the
When VDCR2<VDxEN>=1, a drop of the supply voltage (VDD) below the detection voltage (VDxLVL)
Once VDCR1<VDxF> has been set to 1, this state is retained even if VDCR2<VDxEN> is cleared to 0.
When VDCR2<VDxEN>=1, a drop of the supply voltage (VDD) below the detection voltage (VDxLVL) also
Unlike the VDCR1<VDxF> flag, the VDCR1<VDxSF> flag does not remain set and changes its state ac-
Note:Depending on the voltage detect timing, the voltage detect status flag (VDCR1<VDxSF>) may be set
Voltage detection reset signal
one machine cycle before the voltage detect flag (VDCR1<VDxF>) is set.
Voltage detection level
VDCR2<VDEN>
VDD level
Figure 7-3 Voltage Detection Reset Signal
VDCR2 because of "0" the flag is not set
Page 67
"0" the entry to VDCR1
TMP86FH92DMG